Method of forming stressed semiconductor layer
AssigneesSTMicroelectronics S.r.l., STMicroelectronics (Crolles 2) SAS
InventorsDenis Rideau, Elise Baylac, Emmanuel Josse, Pierre Morin, Olivier Nier
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AssigneesSTMicroelectronics S.r.l., STMicroelectronics (Crolles 2) SAS
InventorsDenis Rideau, Elise Baylac, Emmanuel Josse, Pierre Morin, Olivier Nier
Estimating the term…
The invention concerns a method of forming a semiconductor layer having uniaxial stress including: forming, in a semiconductor structure having a stressed semiconductor layer, one or more first isolation trenches in a first direction for delimiting a first dimension of at least one transistor to be formed in said semiconductor structure; forming, in the semiconductor structure, one or more second isolation trenches in a second direction for delimiting a second dimension of the at least one transistor, the first and second isolation trenches being at least partially filled with an insulating material; and before or after the formation of the second isolation trenches, decreasing the viscosity of the insulating material in the first isolation trenches by implanting atoms of a first material into the first isolation trenches, wherein atoms of the first material are not implanted into the second isolation trenches.
A method of forming a semiconductor layer, the method comprising:
A method comprising:
A method comprising:
Dependencies are inferred from the claim text.