US 9,543,168 B2Granted

Defects annealing and impurities activation in semiconductors at thermodynamically non-stable conditions

AssigneeThe United States of America as represented by the Secretary of the Navy

InventorsBoris N. Feigelson, Jordan Greenlee, Travis J. Anderson, Francis J. Kub

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Abstract

A symmetric multicycle rapid thermal annealing (SMRTA) method for annealing a semiconductor material without the material decomposing. The SMRTA method includes a first long-time annealing at a first temperature at which the material is thermodynamically stable, followed by multicycle rapid thermal annealing (MRTA) at temperatures at which the material is not thermodynamically stable, followed in turn by a second long-time annealing at a second temperature at which the material is thermodynamically stable. The SMRTA method can be used to form p-type and n-type semiconductor regions in doped III-nitride semiconductors, SiC, and diamond.

Claims30

Dependent claims

A process for annealing a semiconductor material without the material decomposing, the process including the steps of:

(1) capping a semiconductor sample with a material that is thermodynamically stable at maximum annealing temperature;
(2) positioning the capped semiconductor sample inside an enclosure;
(3) charging the enclosure with one of an inert gas, nitrogen, hydrogen, and mixtures thereof at an applied gas pressure above one atmosphere;
and
(4) subjecting the capped semiconductor sample to a temperature Tconv1 lower than temperature TS for a predetermined time period tconv1, TS being a temperature above which the semiconductor sample becomes thermodynamically unstable at the applied gas pressure and tconv1 being at least several minutes or longer;
(5) at the end of tcov1, subjecting the capped semiconductor sample to a plurality of heating and cooling cycles, each heating and cooling cycle including
(a) rapidly heating the sample for a duration of several seconds from a temperature Ts1tart to a predetermined temperature Tmax, Tstart being lower than TS and Tmax being higher than TS;
(b) rapidly cooling the sample to a temperature Tend for a duration of several seconds, Tend being just lower than TS;
and
(c) holding the sample at the temperature range between Tstart and Tend for a predetermined time period thold, thold being from several seconds up to several minutes;
wherein during each heating and cooling cycle the sample is exposed to temperatures within a predetermined temperature range between TS and Tmax for a predetermined time period tpulse, tpulse being less than a time td at which the sample would start to decompose at the predetermined temperature range;
and
wherein at the end of the plurality of heating and cooling cycles, the sample has been heated to temperatures within the predetermined temperature range between TS and Tmax for a total cumulative time of all cycles tsum greater than td, without the sample decomposing;
and
(6) following the last of the plurality of heating and cooling cycles, subjecting the capped semiconductor sample to a temperature Tconv2 for a predetermined time period tconv2, Tconv2 being lower than TS and tconv2 being at least several minutes or longer;
wherein any one or more of Tconv1, Tstart, Tend and Tconv2 can be equal.

13 more elements

A process for annealing a semiconductor material without the material decomposing, the process including the steps of:

(1) capping a semiconductor sample with a material that is thermodynamically stable at an annealing temperature;
(2) implanting the sample with a plurality of dopant ions to form a doped capped semiconductor sample;
(3) positioning the doped capped semiconductor sample inside an enclosure;
(4) charging the enclosure with one of an inert gas, nitrogen, hydrogen, and mixtures thereof at an applied gas pressure above one atmosphere;
and
(5) subjecting the doped capped sample to a temperature Tconv1 lower than temperature TS for a predetermined time period tconv1, TS being a temperature above which the doped capped semiconductor sample becomes thermodynamically unstable at the applied gas pressure and tconv1 being at least several minutes or longer;
(6) at the end of tconv1, subjecting the doped capped semiconductor sample to a plurality of heating and cooling cycles, each heating and cooling cycle including
(a) rapidly heating the sample for a duration of several seconds from a temperature Tstart to a predetermined temperature Tmax, Tstart being lower than TS and Tmax being higher than TS;
(b) rapidly cooling the sample to a temperature Tend for a duration of several seconds, Tend being just lower than TS;
and
(c) holding the sample at the temperature range between Tstart and Tend for a predetermined time period thold, thold being from several seconds up to several minutes;
wherein during each heating and cooling cycle the sample is exposed to temperatures within a predetermined temperature range between TS and Tmax for a predetermined time period tpulse, tpulse being less than a time td at which the sample would start to decompose at the predetermined temperature range;
and
wherein at the end of the plurality of heating and cooling cycles, the sample has been heated to temperatures within the predetermined temperature range between TS and Tmax for a total cumulative time of all cycles tsum greater than td, without the sample decomposing;
and
(7) following the last of the plurality of heating and cooling cycles, subjecting the doped capped semiconductor sample to a temperature Tconv2 for a predetermined time period tconv2, Tconv2 being lower than TS and tconv2 being at least several minutes or longer;
wherein any one or more of Tconv1, Tstart, Tend and Tconv2 can be equal.

14 more elements

Dependencies are inferred from the claim text.

Facts

Application: 15/015,381Filed 4 Feb 2016 · us provisional application
Priority: 6 Feb 2015
Published: US 2016/0233108 A111 Aug 2016
Granted: 10 Jan 2017
Term ends: Not estimatedThe source records don’t support an estimate.

Classification11 codes

H10P 95/90
Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass: thermal treatments, e.g. annealing…
H10P 30/206
Characterised by the semiconductor materials: into Group III-V semiconductors
H10P 30/21
Into semiconductor materials, e.g. for doping: of electrically active species
H10P 30/28
Into semiconductor materials, e.g. for doping: characterised by an annealing step, e.g. for activation of dopants