Method of forming minute patterns and method of manufacturing a semiconductor device using the same

A method of manufacturing a semiconductor device, the method comprising:

• sequentially forming a gate layer, a hard mask layer, and an intermediate layer on a substrate, the substrate having first and second regions therein;
• forming a plurality of first masks on the intermediate layer in a second direction, each of the first masks extending in a first direction crossing the second direction;
• forming a second mask layer on the first masks and the intermediate layer;
• removing a portion of the second mask layer in the first region;
• removing portions of the second mask layer on top surfaces of the first masks and a top surface of the intermediate layer to form second masks on sidewalls of each of the first masks in the second region, the top surfaces of the first masks and the top surface of the intermediate layer being exposed, and each of the first masks and the second masks on the sidewalls of each of the first masks defining a third mask;
• etching the intermediate layer using the first masks and the third masks as an etching mask to form a plurality of first patterns and a plurality of second patterns in the first region and the second region, respectively, each of the first patterns having a first width in the second direction, and each of the second patterns having a second width in the second direction, the second width being greater than the first width;
• etching the hard mask layer using the first patterns and the second patterns as an etching mask to form a plurality of first hard masks and a plurality of second hard masks in the first region and the second region, respectively;
• and
• etching the gate layer using the first hard masks and the second hard masks as an etching mask to form first gates and second gates in the first region and the second region, respectively.

A method of manufacturing a semiconductor device, the method comprising:

• forming an isolation layer pattern on a substrate to define an active fin on the substrate, the substrate including first and second regions, a lower portion of the active fin covered by the isolation layer pattern, and an upper portion of the active fin protruding above a top surface of the isolation layer pattern;
• sequentially forming a dummy gate layer structure, a hard mask layer, and an intermediate layer on the active fin and the isolation layer pattern;
• forming a plurality of first masks on the intermediate layer in a second direction, each of the first masks extending in a first direction substantially perpendicular to the second direction;
• forming second masks on sidewalls of each of the first masks in the second region to define a third mask, the third mask including each of the first masks and the second masks on the sidewall of each of the first masks;
• etching the intermediate layer using the first masks and the third masks as an etching mask to form a plurality of first patterns and a plurality of second patterns in the first region and the second region, respectively;
• etching the hard mask layer using the first patterns and the second patterns as an etching mask to form a plurality of first hard masks and a plurality of second hard masks in the first regions and the second regions, respectively;
• etching the dummy gate layer structure using the first hard masks and the second hard masks as an etching mask to form a plurality of first dummy gate structures and a plurality of second dummy gate structures in the first region and the second region, respectively, each of the first dummy gate structures having a first width in the second direction, and each of the second dummy gate structures having a second width in the second direction, the second width being greater than the first width;
• and
• replacing the first dummy gate structures and the second dummy gate structures with first gate structures and second gate structures, respectively.