Configuration and testing for magnetoresistive memory to ensure long term continuous operation
AssigneeEverspin Technologies, Inc.
InventorsJason Janesky, Syed M. Alam, Dimitri Houssameddine, Mark Deherrera
Life of this patent
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Abstract
Techniques and circuits for testing and configuring magnetic memory devices are presented. Registers and nonvolatile storage is included on the memory devices for storing values used to control testing of the memory devices as well as for configuring parameters related to both testing and normal operation. Examples include adjustment of bias voltages, sense amplifier offset values, and timing parameters to improve the efficiency of testing operations as well as improve reliability and speed of normal operation.
Claims18
A method of operation of a magnetic memory device, comprising:
- performing a series of read operations for memory cells included on the memory device, wherein at least one read parameter is varied during performance of the series of read operations, wherein each read operation includes a self-referenced read, wherein for each memory cell, the self-referenced read further comprises:
- performing a first sensing operation for the memory cell, wherein the first sensing operation includes providing a read current through the memory cell to detect the resistance of the memory cell;
- after performing the first sensing operation, applying a write current through the memory cell to store a first data value in the memory cell, wherein the write current forces the memory cell into a first state corresponding to the first data value;
- after applying the write current and forcing the memory cell into the first state, performing a second sensing operation for the memory cell, wherein the second sensing operation includes providing the read current through the memory cell to detect the resistance of the memory cell in the first state;
- and
- determining a data value stored in the memory cell based on the first sensing operation and the second sensing operations;
- determining a selected parameter setting for the at least one read parameter based on the series of read operations;
- and
- storing the selected parameter setting in nonvolatile storage on the memory device.
A method of operation of a magnetic memory device, comprising:
- performing a series of write operations for memory cells included on the memory device, wherein at least one write parameter is varied during performance of the series of write operations, wherein the at least one write parameter includes a length of time for a write pulse through each memory cell during a write operation;
- determining a selected parameter setting for the at least one write parameter based on the series of write operations;
- and
- storing the selected parameter setting in nonvolatile storage on the memory device;
- wherein determining a selected parameter setting further comprises:
- reading stored data values in the memory cells;
- comparing the stored data values in memory cells with values written during the series of write operations;
- and
- determining the selected parameter setting based on the comparison of the stored data values determined with the values written.
A magnetic memory device, comprising:
- an array of memory cells, each memory cell including a magnetic tunnel junction coupled in series with a corresponding selection transistor;
- a plurality of data storage elements;
- a plurality of sense amplifiers coupled to the array of memory cells and the plurality of data storage elements, wherein during an activate operation, the plurality of sense amplifiers is configured to determine data states of a portion of the memory cells included in the array of memory cells, wherein during the activate operation the data states for the portion of the memory cells are loaded into the plurality of data storage elements;
- write driver circuitry coupled to the array of memory cells, the write driver circuitry configured to provide write current through selected memory cells to store a selected data state in the selected memory cells;
- and
- self-test circuitry configured to:
- initiate a customized activate operation with respect to a selected portion of the array of memory cells, wherein as a result of the customized activate operation, a same data value is stored for each memory cell of the selected portion in a corresponding data storage element of the plurality of data storage elements, wherein the same data value is stored for each memory cell regardless of a corresponding actual data value stored in each memory cell;
- after initiating the customized activate operation, initiating a precharge operation with respect to the portion of the plurality of memory cells, wherein, based on the same data value stored in each of the data storage elements, the precharge operation writes the same data value to each memory cell in the portion of the plurality of memory cells;
- wherein the self-test circuitry is further configured to:
- adjust read parameters corresponding to reading data stored in the array of memory cells, wherein the read parameters are adjusted to result in the same data value being determined for each memory cell during the customized activate operation regardless of the corresponding actual data value stored in each memory cell.
Dependencies are inferred from the claim text.