System and method of programming a memory cell
AssigneeQUALCOMM Incorporated
InventorsXia Li, Seung Hyuk Kang, Xiaochun Zhu
Life of this patent
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Abstract
A method includes applying a programming voltage to a drain of an access transistor, where a source of the access transistor is coupled to a drain region of a one-time programmable (OTP) device. The method also includes applying a first voltage to a gate of the OTP device and a second voltage to a terminal of the OTP device to bias a channel region of the OTP device, where the first voltage and the second voltage are substantially equal.
Claims18
An apparatus comprising:
- a processor;
- and
- a memory storing instructions executable by the processor to perform operations comprising:
- applying a programming voltage to a drain of an access transistor, wherein a source of the access transistor is coupled to a drain region of a one-time programmable (OTP) device;
- and
- applying a first voltage to a gate of the OTP device and a second voltage to a terminal of the OTP device to bias a channel region of the OTP device and to maintain a second voltage difference between the gate and the channel region at less than a breakdown voltage of the OTP device, wherein the first voltage and the second voltage are substantially equal.
A method for programming a one-time programmable (OTP) device, the method comprising:
- applying a programming voltage to a drain of an access transistor, wherein a source of the access transistor is coupled to a drain region of the OTP device;
- and
- applying a first voltage to a gate of the OTP device and a second voltage to a terminal of the OTP device to bias a channel region of the OTP device and to maintain a second voltage difference between the gate and the channel region at less than a breakdown voltage of the OTP device, wherein the first voltage and the second voltage are substantially equal.
A non-transitory computer-readable medium comprising instructions for programming a one-time programmable (OTP) device, the instructions, when executed by a processor, cause the processor to:
- apply a programming voltage to a drain of an access transistor, wherein a source of the access transistor is coupled to a drain region of the OTP device;
- and
- apply a first voltage to a gate of the OTP device and a second voltage to a terminal of the OTP device to bias a channel region of the OTP device and to maintain a second voltage difference between the gate and the channel region at less than a breakdown voltage of the OTP device, wherein the first voltage and the second voltage are substantially equal.
An apparatus comprising:
- means for applying a programming voltage to a drain of an access transistor, wherein a source of the access transistor is coupled to a drain region of a one-time programmable (OTP) device;
- and
- means for applying a first voltage to a gate of the OTP device and a second voltage to a terminal of the OTP device to bias a channel region of the OTP device and to maintain a second voltage difference between the gate and the channel region at less than a breakdown voltage of the OTP device, wherein the first voltage and the second voltage are substantially equal.
Dependencies are inferred from the claim text.