Semiconductor memory device, control method, and memory system
AssigneeKabushiki Kaisha Toshiba
InventorsKoichi Shinohara, Yoshikazu Takeyama
Life of this patent
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AssigneeKabushiki Kaisha Toshiba
InventorsKoichi Shinohara, Yoshikazu Takeyama
Estimating the term…
According to one embodiment, a semiconductor memory device includes a memory cell array, a first circuit, and a second circuit. The first circuit executes program and read. The program is processing for changing a threshold voltage of a memory cell to a voltage according to data. The data includes first data of a bit and second data of a bit. The program of the second data is executed after the program of the first data. The read includes measuring the threshold voltage. The second circuit manipulates a flag in accordance with execution of the program of the second data. In a case where the second data is a target of the read, the second circuit refers to the flag. In a case where the flag indicates non-execution of the program of the second data, the second circuit aborts the measuring before the measuring of the threshold voltage is completed.
A semiconductor memory device comprising:
A control method for controlling a memory cell array having a word line, comprising:
A memory system comprising:
Dependencies are inferred from the claim text.