US 9,543,022 B2 · Semiconductor memory device

Abstract

A semiconductor memory device includes first and second plugs formed on a semiconductor substrate, a word line between the first and second plugs and above the semiconductor substrate, a first semiconductor pillar extending above the semiconductor substrate through the word line, a second semiconductor pillar extending above the semiconductor substrate through the word line, a first bit line electrically connected to the first semiconductor pillar, and a second bit line electrically connected to the second semiconductor pillar. When writing same data in a first memory cell, which is electrically connected to the first bit line, and a second memory cell, which is electrically connected to the second bit line, a first voltage is applied to the first bit line and a second voltage that is different from the first voltage is applied to the second bit line.

Claims20

Dependent claims

A semiconductor memory device comprising:

first and second plugs formed on a semiconductor substrate;
a word line between the first and second plugs and above the semiconductor substrate;
a first semiconductor pillar extending above the semiconductor substrate through the word line;
a second semiconductor pillar extending above the semiconductor substrate through the word line;
a first bit line electrically connected to the first semiconductor pillar;
and
a second bit line electrically connected to the second semiconductor pillar, wherein
when writing same data in a first memory cell, which is electrically connected to the first bit line, and a second memory cell, which is electrically connected to the second bit line, a first voltage is applied to the first bit line and a second voltage that is different from the first voltage is applied to the second bit line.

5 more elements

A semiconductor memory device comprising:

first, second, and third plugs formed on a semiconductor substrate;
a first word line between the first and second plugs and above the semiconductor substrate;
a second word line between the second and third plugs and above the semiconductor substrate;
first and second semiconductor pillars extending above the semiconductor substrate through the first word line;
third and fourth semiconductor pillars extending above the semiconductor substrate through the second word line;
a first bit line electrically connected to the first and fourth semiconductor pillars;
and
a second bit line electrically connected to the second and third semiconductor pillars, wherein
a diameter of the first semiconductor pillar is less than each of diameters of the second and fourth semiconductor pillars, and
a diameter of the third semiconductor pillar is less than each of the diameters of the second and fourth semiconductor pillars.

7 more elements

Dependencies are inferred from the claim text.

Semiconductor memory device

Life of this patent

Semiconductor memory device

Life of this patent

Abstract

Claims20