Semiconductor device and programming method thereof
AssigneeSK hynix Inc.
InventorsSe Jun Kim, Jae Il Tak, Kyung Hwan Park
Life of this patent
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Abstract
A semiconductor device includes a plurality of electrically coupled memory cells in a generally vertical configuration extending in a generally perpendicular direction from a semiconductor substrate, a peripheral circuit configured to program the memory cells, and a control circuit configured to program a memory cell selected from the plurality of memory cells to trap charge in the selected memory cell, and to issue at least one command to the peripheral circuit to manage a dispersion of at least a portion of the trapped charge between memory cells adjacent to the selected memory cell.
Claims20
A semiconductor device comprising:
- a plurality of electrically coupled memory cells in a generally vertical configuration extending in a substantially perpendicular direction from a semiconductor substrate;
- a peripheral circuit configured to program the memory cells;
- and
- a control circuit configured to program a memory cell selected from the plurality of memory cells to trap charge in the selected memory cell, and to issue at least one command to the peripheral circuit to disperse the charge trapped in the selected memory cell in a direction of the memory cells adjacent to the selected memory cell, but not such that the charge is trapped in the adjacent memory cells.
A programming method of a semiconductor device, comprising:
- programming a selected memory cell so that charge is trapped in the selected memory cell;
- dispersing at least a portion of the charge trapped in the selected memory cell in a direction of memory cells adjacent to the selected memory cell, but not such that the dispersed charge is trapped in the memory cells adjacent to the selected memory cell;
- and
- verifying the selected memory cell.
A programming method of a semiconductor device, comprising:
- programming a selected memory cell by applying a programming voltage to a selected word line electrically coupled to the selected memory cell so that charge is trapped in the selected memory cell;
- dispersing at least a portion of the charge trapped in the selected memory cell between memory cells adjacent to the selected memory cell by applying a first sub-voltage to adjacent word lines electrically coupled to the adjacent memory cells, but not such that the dispersed charge is trapped in the memory cells adjacent to the selected memory cell;
- verifying the selected memory cell by applying a verification voltage to the selected word line;
- and
- repeating the programming of the selected memory cell, the dispersing of at least a portion of the charge, and the verifying of the selected memory cell until the selected memory cell passes a verification operation associated with verifying the selected memory cell.
Dependencies are inferred from the claim text.