Nonvolatile semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorYuya Suzuki
Life of this patent
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Abstract
A nonvolatile semiconductor memory device includes an array of memory cells arranged at the position intersecting positions of the word line and the bit line, a control signal generating circuit for carrying out a writing operation including a program for carrying out writing in the memory cell and a verification for verifying whether the data has been correctly written in the memory cell by the program, and a cell source monitoring circuit for detecting a voltage of the source line connected to the memory cell during the writing operation. The control signal generating circuit directly shifts the source line voltage at the time of program to a lower voltage necessary at the time of verification after the end of the program, based on the voltage the source line detected by the cell source monitoring circuit.
Claims19
A nonvolatile semiconductor memory device, comprising:
- a memory cell array having a plurality of memory cells arranged at intersections of word lines and bit lines;
- a control circuit configured to carry out a write operation including a program for carrying out writing data to a memory cell, and verification for verifying whether the data has been correctly written to the memory cell by the program;
- and
- a source line monitoring circuit configured to detect a voltage of a source line connected to the memory cell during the write operation,
- wherein the control circuit is configured to directly shift the voltage of the source line, without first discharging the source line, from a first voltage equal to a voltage of the source line during the program to a second voltage equal to a voltage required at the time of verification after the end of the program.
A nonvolatile semiconductor memory device, comprising:
- a memory cell array having a plurality of memory cells arranged at intersections of word lines and bit lines;
- a control circuit configured to carry out a write operation including a program for carrying out writing data to a memory cell, and verification for verifying whether the data has been correctly written to the memory cell by the program;
- a source line monitoring circuit configured to detect a voltage of a source line connected to the memory cell during the write operation;
- and
- a word line monitoring circuit configured to detect a voltage of the word line during the write operation,
- wherein the control circuit is configured to directly shift each voltage of the source line and a selected word line from a high level to a low level without discharging either the source line or the selected word line to a level that is lower than the low level.
A method of writing data to a nonvolatile semiconductor memory device having a memory cell array having a plurality of memory cells arranged at intersections of word lines and bit lines, said method comprising:
- writing data to a memory cell according to a program during a writing operation;
- after the end of the program, directly shifting a voltage of a source line connected to the memory cell, without first discharging the source line, from a first voltage equal to a voltage of the source line during the program to a second voltage equal to a voltage of the source line required at the time of verification of data written to the memory cell;
- and
- verifying whether the data has been correctly written to the memory cell.
Dependencies are inferred from the claim text.