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US 9,543,018 B2Granted
Non-volatile memory with a variable polarity line decoder
AssigneeSTMicroelectronics (Rousset) SAS
InventorFrancesco La Rosa
Life of this patent
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Abstract
The present disclosure relates to a memory including a memory array with at least two rows of memory cells, a first driver coupled to a control line of the first row of memory cells, and a second driver coupled to a control line of the second row of memory cells. The first driver is made in a first well, the second driver is made in a second well electrically insulated from the first well, and the two rows of memory cells are produced in a memory array well electrically insulated from the first and second wells.
Claims20
A non-volatile memory, comprising:
- a memory array comprising at least two rows of memory cells,
- a line decoder common to the entire memory array, comprising a first driver coupled to a control line of a first row of the at least two rows of memory cells, a second driver coupled to a control line of a second row of the at least two rows memory cells, and a predecoder supplying the drivers with selection signals of variable polarity, either positive or negative, which are combined by the drivers to supply the control lines with control signals of variable polarity depending on the selection signals, and
- wherein the first driver is made in a first well in a semiconductor substrate, the second driver is made in a second well in the semiconductor substrate electrically insulated from the first well, and the at least two rows of memory cells are produced in a single memory array well in the semiconductor substrate that is electrically insulated from the first and second wells.
A method, comprising:
- forming in a first well a first driver coupled to a control line of a first row of at least two rows of non-volatile memory cells,
- forming, in a second well electrically insulated from the first well, a second driver coupled to a control line of a second row of the at least two rows of non-volatile memory cells,
- forming the at least two rows of non-volatile memory cells in a single memory array well electrically insulated from the first and second wells,
- applying to the drivers selection signals of variable polarity, either positive or negative, and
- combining the selection signals by means of the drivers to supply the control lines with control signals of variable polarity depending on the selection signals.
2 more elements
An electronic device, comprising:
- an integrated circuit including at least one non-volatile memory, each of the at least one non-volatile memory comprising;
- a memory array comprising at least two rows of memory cells,
- a line decoder coupled to the memory array, the line decoder including,
- a first driver coupled to a control line of a first row of the at least two rows of memory cells,
- a second driver coupled to a control line of a second row of the at least two rows memory cells, and
- a predecoder supplying the drivers with selection signals of variable polarity, either positive or negative, which are combined by the drivers to supply the control lines with control signals of variable polarity depending on the selection signals, and
- wherein the first driver is formed in a first well in a semiconductor substrate, the second driver is formed in a second well in the semiconductor substrate electrically insulated from the first well, and the at least two rows of memory cells are formed in a single memory array well in the semiconductor substrate that is electrically insulated from the first well and the second well.
4 more elements
Dependencies are inferred from the claim text.