System for writing data in a memory
AssigneeCommissariat A L'energie Atomique Et Aux Energies Alternatives
InventorMichel Harrand
Life of this patent
Estimating the term…
Abstract
A system including: a first memory including several portions of one or more pages each, said memory including first and second ports that can simultaneously access, for reading and writing respectively, two distinct pages of portions of the memory; and a control circuit capable of performing write operations to the pages of the memory, each write operation to a page of the memory requiring a reading step of a former datum on said page via the first port, and including a writing step of a new datum to the page via the second port, taking account of the former datum.
Claims8
A system comprising:
- a first memory comprising a plurality of portions of a plurality of pages each, the memory comprising first and second ports providing simultaneous access, respectively in read and in write mode, to two pages of the memory, provided for these pages to belong to different portions of the memory, each portion of the first memory comprising a single port of access to the pages of the portion, this port being capable of being connected to one or the other of the first and second ports of the first memory by multiplexing circuits;
- a control circuit capable of carrying out write operations in pages of the memory, each write operation in a page of the memory comprising a step of reading old data contained in this page, followed by a step of writing new data into this page via the second port while taking into account the old data;
- and
- a second memory comprising a number of lines equal to the number of pages of a portion of the first memory, and such that each line of the second memory corresponds to an address of a page in the first memory, each line of the second memory containing a first field, a second field, a third field, and a fourth field,
- wherein the control circuit is capable to store in the first field an address of a portion of the first memory, to store in the second field data read from the corresponding page of the portion whose address is stored in the first field, to store in the third field data to be written in the corresponding page of the portion whose address is stored in the first field, and to store in the fourth field a validity bit,
- and wherein the control circuit is capable, for each write operation in a page of the first memory, of consulting the fourth field of the line having its address in the second memory corresponding to the address of the targeted page in the portion to which it belongs, and, when this fourth field is in an invalid state, to read and old data contained in the targeted page and write this data in the second field of the line, to write a new data in the third field of the line, to write the address of the portion containing the targeted page in the first field of the line, and to set the fourth field of the line to a valid state.
Dependencies are inferred from the claim text.