Resistive memory and measurement system thereof

A measurement system, comprising:

• a testing machine providing a row address, a column address, a word voltage, a bit voltage, and a source voltage;
• and
• a resistive memory comprising:
• a row controller coupled to a plurality of word lines and transmitting the word voltage to a first word line among the word lines according to the row address;
• a column controller coupled to a plurality of bit lines and transmitting the bit voltage to a first bit line among the bit lines according to the column address;
• and
• a first storage cell comprising at least one transistor and at least one variable resistor, wherein a gate of the transistor is coupled to the first word line, a source of the transistor is coupled to a source line, the variable resistor is couple between the first bit line and a drain of the transistor, and the source line receives the source voltage,
• wherein in a specific period, the testing machine provides a write voltage to change a state of the variable resistor, the testing machine maintains the level of the write voltage and measures a current flowing through the variable resistor in a maintaining period, and when the current flowing through the variable resistor does not arrive at a pre-determined value, the testing machine increases the write voltage.