Multistage memory cell read
AssigneeIntel Corporation
InventorsSandeep K Guliani, Kiran Pangal, Balaji Srinivasan, Chaohong Hu
Life of this patent
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Abstract
A multistage read can dynamically change wordline capacitance as a function of threshold voltage of a memory cell being read. The multistage read can reduce current spikes and reduce the heating up of a memory cell during a read. A memory device includes a global wordline driver to connect a wordline of a selected memory cell to the sensing circuit, and a local wordline driver local to the memory cell. After the wordline is charged to a read voltage, control logic can selectively enable and disable a portion or all of the global wordline driver and the local wordline driver in conjunction with applying different discrete voltage levels to the bitline to perform a multistage read.
Claims22
A memory device having multiple memory cells disposed between respective wordlines and bitlines, comprising:
- a wordline driver to charge the respective wordline of a memory cell selected for a read operation;
- a bitline driver to apply multiple read voltages to the respective bitline of the selected memory cell, wherein a worst case thresholding voltage is expected for substantially all memory cells to cause a current to flow through the memory cell when the thresholding voltage is applied to respective bitlines of the memory cells, the bitline driver to
- apply a first read voltage of a voltage level lower than the worst case thresholding voltage to trigger a read of at least a portion of the memory cells;
- and
- ramp the read voltage to subsequently apply a second read voltage of a voltage level approximately equal to the worst case thresholding voltage to trigger a read of at least another portion of the memory cells;
- and
- a sensing circuit to read the memory cell when current flows through the memory cell.
A method for reading a memory device, comprising:
- charging a wordline of a memory cell selected to read, wherein the memory cell is one of multiple memory cells of the memory device, each memory cell disposed between a wordline and a bitline, wherein a worst case thresholding voltage is expected for substantially all memory cells to cause a current to flow through the memory cell when the thresholding voltage is applied to respective bitlines of the memory cells for a read operation;
- applying a first read voltage to the bitline of the selected memory cell to trigger a read of at least a portion of the memory cells, the first read voltage of a voltage level lower than the worst case thresholding voltage;
- and
- ramping the read voltage to subsequently apply a second read voltage to the bitline of the selected memory cell to trigger a read of at least another portion of the memory cells, the second read voltage of a voltage level approximately equal to the worst case thresholding voltage.
An electronic device comprising:
- a phase change memory device having multiple memory cells disposed between respective wordlines and bitlines, the memory device including
- a wordline driver to charge the respective wordline of a memory cell selected for a read operation;
- a bitline driver to apply multiple read voltages to the respective bitline of the selected memory cell, wherein a worst case thresholding voltage is expected for substantially all memory cells to cause a current to flow through the memory cell when the thresholding voltage is applied to respective bitlines of the memory cells, the bitline driver to
- apply a first read voltage of a voltage level lower than the worst case thresholding voltage to trigger a read of at least a portion of the memory cells;
- and
- ramp the read voltage to subsequently apply a second read voltage of a voltage level approximately equal to the worst case thresholding voltage to trigger a read of at least another portion of the memory cells;
- and
- a sensing circuit to read the memory cell when current flows through the memory cell;
- and
- a touchscreen display coupled to generate a display based on data accessed from the memory device.
Dependencies are inferred from the claim text.