Semiconductor memory device and method for accessing the same

A semiconductor memory device, comprising a four-terminal oxide heterojunction transistor in 1T configuration in which the oxide heterojunction transistor functions both as a storage clement and as a control element, which comprises:

• a semiconductor substrate;
• a back gate being buried in the semiconductor substrate;
• oxygen-contained compound base layer on the back gate;
• an oxygen-contained compound film on the oxygen-contained compound base layer, wherein an interfacial layer between the oxygen-contained compound base layer and the oxygen-contained compound film behaves like. two-dimensional electron gas;
• a source electrode and a drain electrode being located on the oxygen-contained compound film and electrically connected with the interfacial layer;
• and
• a front gate on the oxygen-contained compound film,
• wherein the source electrode and the drain electrode of the oxide heterojunction transistor are respectively connected with a first word line and a first bit line for reading operation, and
• wherein the front gate and the back gate are respectively connected with a second word line and a second bit line for writing operation, and
• wherein the semiconductor memory device is a memory cell in an array of memory cells, the array comprising a plurality of bit lines arrange orthogonally to a plurality of word lines, wherein each memory cell is directly connected to two of the plurality of word lines and to two of the plurality of bit lines, and each memory cell comprises only the four-terminal oxide heterojunction transistor.