Back to results
US 9,542,985 B2Granted
Channel skewing
AssigneeMicron Technology, Inc.
InventorsTravis E. Swanson, Paul J. Voit, Ryan M. Przybilla
Life of this patent
Estimating the term…
Abstract
The present disclosure includes methods and systems for channel skewing. One or more methods for channel skewing includes providing a number of groups of data signals to a memory component, each of the number of groups corresponding to a respective channel, and adjusting a phase of a group of data signals corresponding to at least one of the number of channels such that the group of data signals are skewed with respect to a group of data signals corresponding to at least one of the other respective channels.
Claims9
An apparatus, comprising:
- a memory device with a receiver component;
- a controller associated with a plurality of memory channels, each of the plurality of memory channels having a respective group of data signals and a respective channel clock signal associated therewith;
- at least one delay component coupled to the controller and configured to, based on a reference clock signal, provide a skew amount to at least one of the channel clock signals such that the at least one of the channel clock signals is out of phase with respect to the channel clock signal of at least one different memory channel;
- wherein the controller is configured to transmit the respective channel clock signals along with their respective associated data signals to the receiver component in a source-synchronous manner;
- and
- wherein the receiver component does not de-skew the respective associated data signals;
- and
- wherein the skew amount is provided to the at least one of the channel clock signals such that groups of data signals of every other channel are skewed by a same amount.
5 more elements
An apparatus, comprising:
- a plurality of memory devices;
- a controller coupled to the plurality of memory devices via a respective plurality of channels, the controller configured to:
- provide each of a plurality of groups of data signals to one of the respective plurality of memory devices;
- for each respective one of the plurality of groups, provide a respective channel clock signal corresponding to the respective group to the corresponding memory device along with the respective group of data signals;
- wherein for each respective one of the plurality of groups, a reference clock signal corresponding to the respective channel clock signals is not sent to the respective plurality of memory devices along with the respective one of the plurality of groups;
- and
- wherein the plurality of groups of data signals provided to the respective plurality of memory devices are not de-skewed by receiver components of the plurality of memory devices;
- and wherein the controller is configured to adjust phases of the channel clock signals such that groups of data signals of every other channel are skewed by a same amount.
5 more elements
Dependencies are inferred from the claim text.