Semiconductor memory apparatus and operation method using the same
AssigneeSK hynix Inc.
InventorJung Hyuk Yoon
Life of this patent
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Abstract
A semiconductor memory apparatus includes a command processing block configured to generate a voltage generation start signal, a first write control signal, a second write control signal, a read signal, and an operation signal in response to a first control signal and a second control signal in a write operation, and a memory control block configured to electrically couple a memory block, which stores data, to a sense amplifier or apply a predetermined voltage to the memory block in response to the voltage generation start signal, the first write control signal, the second write control signal, the read signal, and the operation signal.
Claims4
A semiconductor memory apparatus comprising:
- a memory cell array configured to include a plurality of memory cells, and store data according to a voltage level of a memory voltage at a memory cell of a position designated by a word line and a bit line;
- a voltage supply unit configured to generate the memory voltage when an external command is a write command, and apply the memory voltage to the memory cell array in response to a control signal;
- and
- a data comparison block configured to compare data input from exterior with storage data, and generate the control signal.
Dependencies are inferred from the claim text.