Systems and methods for processing data with power ramp control
AssigneeAvago Technologies General IP (Singapore) Pte. Ltd.
InventorsKaitlyn T. Nguyen, Shaohua Yang, Dan Liu, Xiao Dong Yan, Qi Zuo
Life of this patent
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Abstract
An apparatus for processing data includes a data processing circuit configured to process user data, wherein the data processing circuit comprises a number of sub-circuits, a number of clock gates each configured to control a clock signal to one of the sub-circuits, a gating control circuit configured to control the clock gates to apply the clock signal to each of the sub-circuits in staged fashion during a ramped power up operation, and a dummy data source configured to provide dummy data to the data processing circuit during the ramped power up operation of the data processing circuit.
Claims11
An apparatus for processing data, comprising:
- a data processing circuit configured to process user data, wherein the data processing circuit comprises a plurality of sub-circuits;
- a plurality of clock gates each configured to control a clock signal to one of the plurality of sub-circuits;
- a gating control circuit configured to control the plurality of clock gates to apply the clock signal to each of the plurality of sub-circuits in staged fashion during a ramped power up operation;
- and
- a dummy data source configured to provide dummy data to the data processing circuit during the ramped power up operation of the data processing circuit.
A data processing system comprising:
- means for processing user data;
- means for enabling clock signals to each of a plurality of logic regions in the means for processing user data during a power ramp up period and a power ramp down period in the means for processing user data;
- and
- means for providing dummy data with alternating values to the means for processing user data during the power ramp up period.
Dependencies are inferred from the claim text.