Memory structure
AssigneeMacronix International Co., Ltd.
InventorShih-Hung Chen
Life of this patent
Estimating the term…
Abstract
A memory structure includes N array regions and N page buffers coupled to the N array regions, respectively. N is an integer ≧2. Each of the N array regions includes a 3D array of a plurality of memory cells. The memory cells have a lateral distance d between two adjacent memory cells on a horizontal cell plane of the 3D array. Each of the N array regions further includes a plurality of conductive lines. The conductive lines are disposed over and coupled to the 3D array. The conductive lines have a pitch p, and p/d=⅕ to ½. The N array regions and the N page buffers are arranged on one line along an extension direction of the conductive lines.
Claims11
A memory structure, comprising:
- N array regions, wherein N is an integer ≧2, and each of the N array regions comprises:
- a 3D array of a plurality of memory cells, wherein the memory cells have a lateral distance d between two adjacent memory cells on a horizontal cell plane of the 3D array;
- and
- a plurality of conductive lines disposed over and coupled to the 3D array, wherein the conductive lines have a pitch p, and p/d=⅕ to ½;
- and
- N page buffers coupled to the N array regions, respectively;
- wherein the N array regions and the N page buffers are arranged on one line along an extension direction of the conductive lines;
- wherein N is an even number, and wherein the N array regions comprise a (2n−1)th array region and a 2nth array region, and n is an integer from 1 to N/2;
- and
- wherein the conductive lines of the (2n−1)th array region and the conductive lines of the 2nth array region are misaligned.
Dependencies are inferred from the claim text.