Instructions processors, methods, and systems to process secure hash algorithms

An apparatus comprising:

• a plurality of packed data registers;
• a decoder to decode an instruction, the instruction to indicate as source packed data only a first packed data and a second packed data, the first and second packed data to include:
• a first data element that is to represent a sum of a message input for a current round (i) of a secure hash algorithm 2 (SHA2) hash algorithm, W(i), added to a constant input for the current round K(i), added to a state data element hi for the current round, added to an evaluation of a Ch function with state data elements ei, fi, and gi for the current round, added to an evaluation of a sigma1 function with the state data element ei for the current round;
• a second data element that is to represent a sum of a message input for one round after the current round W(i+1), added to a constant input for one round after the current round K(i+1), added to the state data element gi for the current round;
• and
• state data elements ai, bi, ci, and di for the current round, the state data element ei for the current round, and the state data element fi for the current round, wherein each of the first and second packed data are to be one of 128-bit packed data when the state data element ai is a 32-bit state data element and 256-bit packed data when the state data element ai is a 64-bit state data element;
• and
• execution logic coupled with the packed data registers and coupled with the decoder, the execution logic operable, in response to the instruction to store a result packed data in a destination storage location that is to be indicated by the instruction, the result packed data to include state data elements ei+2, fi+2, gi+2, and hi+2 which are to have been respectively updated from the state data elements ei, fi, gi, and hi by two rounds of the SHA2 hash algorithm.

An apparatus comprising:

• a plurality of packed data registers;
• a decoder to decode an instruction, the instruction to indicate as source packed data only a first packed data and a second packed data, the first and second packed data to include:
• a first data element that is to represent a sum of a message input for a current round (i) of a secure hash algorithm 2 (SHA2) hash algorithm, W(i), added to a constant input for the current round K(i), added to a state data element hi for the current round, added to an evaluation of a Ch function with state data elements ei, fi, and gi for the current round, added to an evaluation of a sigma1 function with the state data element ei for the current round;
• a second data element that is to represent a sum of a message input for one round after the current round W(i+1), added to a constant input for one round after the current round K(i+1), added to the state data element gi for the current round;
• and
• state data elements ai, bi, ci, and di for the current round, the state data element ei for the current round, and the state data element fi for the current round, wherein each of the first and second packed data are to be one of 128-bit packed data when the state data element ai is a 32-bit state data element and 256-bit packed data when the state data element ai is a 64-bit state data element;
• and
• execution logic coupled with the packed data registers and coupled with the decoder, the execution logic operable, in response to the instruction to store a result packed data in a destination storage location that is to be indicated by the instruction, the result packed data to include state data elements ai+2, bi+2, ci+2, and di+2 which are to have been respectively updated from the state data elements ai, bi, ci, and di by two rounds of the SHA2 hash algorithm.

An apparatus comprising:

• a plurality of packed data registers;
• a decoder to decode an instruction, the instruction to indicate a first packed data and a second packed data, the first and second packed data to include:
• a first data element that is to represent a sum of a message input for a current round (i) of a secure hash algorithm 2 (SHA2) hash algorithm, W(i), added to a constant input for the current round K(i);
• a second data element that is to represent a sum of a message input for one round after the current round W(i+1), added to a constant input for one round after the current round K(i+1);
• and
• state data elements ei, fi, gi, and hi for the current round;
• and
• execution logic coupled with the packed data registers and coupled with the decoder, the execution logic operable, in response to the instruction to store a result packed data in a destination storage location that is to be indicated by the instruction, the result packed data to include:
• a first result data element that is to represent a sum of the message input for the current round W(i), added to the constant input for the current round K(i), added to the state data element hi for the current round, added to an evaluation of a Ch function with the state data elements ei, fi, and gi for the current round, added to an evaluation of a sigma1 function with the state data element ei for the current round;
• and
• a second result data element that is to represent a sum of the message input for the one round after the current round W(i+1), added to the constant input for the one round after the current round K(i+1), added to the state data element gi for the current round.