Method and apparatus for selecting data path elements for cloning

A method of selecting data path elements for cloning within an integrated circuit (IC) design, the method comprising:

• performing timing analysis of at least one data path within the IC design to determine at least one timing slack value for the at least one data path;
• calculating at least one annotated delay value for cloning a candidate element within the at least one data path;
• calculating at least one modified slack value for the at least one data path in accordance with the at least one calculated annotated delay value;
• validating the cloning of the candidate element based at least partly on the at least one modified slack value;
• and
• fabricating the IC design based at least on the validated cloning of the candidate element.