Filler insertion in circuit layout
AssigneeTexas Instruments Incorporated
InventorsAnanth Somayaji, Sourav Modi, Sani Dewal, Saravanan Ambikapathy
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Abstract
A method for filler insertions in a circuit layout having a cell row of standard cells and gaps between the standard cells is disclosed. First, a set of filler classes, each filler class having a set of filler cells, is classified that are configured to fill the gaps depending on a design requirement. Then, a filler insertion pattern based on a required ratio is identified such that horizontal and vertical density of the set of filler classes in the circuit layout are as per the required ratio and the cell row of the circuit layout has at least one filler cell from each of the set of filler classes.
Claims10
A method for filler insertions in a circuit layout having a cell row of standard cells and gaps between the standard cells, comprising:
- classifying a set of filler classes including a decap, a standard cell filler and an always-on decap, each filler class having a set of filler cells, that are configured to fill the gaps depending on a design requirement;
- identifying a required ratio of the set of filler classes that fills the gaps in the circuit layout;
- and
- identifying a filler insertion pattern based on the required ratio such that horizontal and vertical density of the set of filler classes in the circuit layout are as per the required ratio and the cell row of the circuit layout has at least one filler cell from each of the set of filler classes;
- wherein the set of filler classes and the standard cells are fabricated on a semiconductor substrate;
- and
- wherein identifying a required ratio of the set of filler classes comprises identifying the required ratio that is configurable as per the design requirement.
A semiconductor device having a circuit layout, the circuit layout comprising:
- a plurality of cell rows of standard cells and gaps between the standard cells;
- and
- a set of filler classes in the gaps, wherein a horizontal and a vertical density of the set of filler classes are the same in the circuit layout and each of the cell rows has one or more types of filler classes of the set of filler classes;
- a required ratio of the set of filler classes that fills the gaps in the circuit layout;
- wherein the set of filler classes and the standard cells are fabricated on a semiconductor substrate;
- and
- wherein the required ratio of the set of filler classes is configurable.
A non-transitory computer readable medium, for use by a computer system, provided with a layout of a circuit for filler insertions in a circuit layout having a plurality of cell rows of standard cells and gaps between the standard cells, comprising:
- a set of filler classes in the gaps, wherein a horizontal and a vertical density of the set of filler classes are the same in the circuit layout and each of the cell rows has one or more types of filler classes of the set of filler classes:
- a required ratio of the set of filler classes that fills the gaps in the circuit layout;
- wherein the set of filler classes and the standard cells are fabricated on a semiconductor substrate;
- and
- wherein the required ratio of the set of filler classes is configurable.
Dependencies are inferred from the claim text.