Memory device, storage method and control device
AssigneeFujitsu Limited
InventorsSadao Miyazaki, Osamu Ishibashi, Jin Abe
Life of this patent
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Abstract
A memory device includes a storage unit in which a plurality of semiconductor chips each comprising a plurality of memory blocks respectively arranged in a planar direction and a plurality of redundant blocks respectively arranged in a planar direction are stacked, a detecting unit configured to detect a defect of each of the memory blocks in the storage unit; a checking unit configured to check free capacity in each of the redundant blocks in the storage unit, and a determining unit configured to determine a substitute block to be substituted for the memory block in which the defect has been detected from the redundant blocks having the free capacity.
Claims9
A memory device comprising:
- a storage unit in which a plurality of semiconductor chips each comprising a plurality of memory blocks respectively arranged in a planar direction and a plurality of redundant blocks respectively arranged in the planar direction are stacked;
- a detecting unit configured to detect a defect of each of the memory blocks in the storage unit;
- a checking unit configured to check free capacity in each of the redundant blocks in the storage unit;
- a determining unit configured to determine a substitute block to be substituted for the memory block in which the defect has been detected from the redundant blocks having the free capacity;
- and
- a control unit configured to access the storage unit,
- the detecting unit detects the defect upon activation of the memory device,
- the checking unit checks the free capacity in the redundant blocks upon activation of the memory device,
- the determining unit determines the substitute block upon activation of the memory device and creates a table defining a correspondence relationship between the memory block in which the defect has been detected and the substitute block, and
- the control unit accesses the storage unit with reference to the table.
A storage method performed by a memory device, the storage method comprising:
- in a storage unit in which a plurality of semiconductor chips each comprising a plurality of memory blocks respectively arranged in a planar direction and a plurality of redundant blocks respectively arranged in the planar direction are stacked, detecting a defect of each of the memory blocks;
- checking free capacity in each of the redundant blocks in the storage unit;
- and
- determining a substitute block to be substituted for the memory block in which the defect has been detected from the redundant blocks having the free capacity,
- the defect is detected upon activation of the memory device,
- the free capacity in the redundant blocks is checked upon activation of the memory device,
- the substitute block is determined upon activation of the memory device and a table defining a correspondence relationship between the memory block at which the defect has been detected and the substitute block is created, and
- the storage unit is accessed with reference to the table.
A control device comprising:
- a storage unit in which a plurality of semiconductor chips each comprising a plurality of memory blocks respectively arranged in a planar direction and a plurality of redundant blocks respectively arranged in the planar direction are stacked;
- a detecting unit configured to detect a defect of each of the memory blocks in the storage unit;
- a checking unit configured to check free capacity in each of the redundant blocks in the storage unit;
- a determining unit configured to determine a substitute block to be substituted for the memory block in which the defect has been detected from the redundant blocks having the free capacity;
- and
- a control unit configured to access the storage unit,
- the detecting unit detects the defect upon activation of the memory device,
- the checking unit checks the free capacity in the redundant blocks upon activation of the memory device,
- the determining unit determines the substitute block upon activation of the memory device and creates a table defining a correspondence relationship between the memory block in which the defect has been detected and the substitute block, and
- the control unit accesses the storage unit with reference to the table.
Dependencies are inferred from the claim text.