Methods and apparatus to protect memory regions during low-power states

An method to manage power states in a processor system, comprising:

• configuring a secure processor to:
• sign a suspend-to-RAM (STR) data structure by:
• generating a STR header key, a STR scatter/gather table key and a dynamic random access memory (DRAM) key using a root key generated by the secure processor;
• generating a STR header signature using the STR header key, the STR header signature based on a STR table header and a random or pseudo-random value;
• generating a STR scatter/gather table signature using the STR scatter/gather table key, the STR scatter/gather table signature based on a STR scatter/gather table header and a random or pseudo-random value;
• generating a DRAM signature using the DRAM key and a value from a region of DRAM;
• and
• storing the STR header signature, the STR scatter/gather table signature and the DRAM signature in the STR data structure;
• and
• resume the processor system from the low-power mode when the STR data structure is valid based on a comparison of a first signature and a second signature, the first signature based on at least one of the STR header signature, the STR scatter/gather table signature or the DRAM signature, the second signature generated in response to a resume instruction.

An integrated circuit comprising instructions that, when executed, cause a machine to at least:

• when transitioning a processor system to a low-power mode, sign a suspend-to-RAM (STR) data structure by:
• generating a STR header key, a STR scatter/gather table key and a dynamic random access memory (DRAM) key using a root key generated by a secure processor;
• generating a STR header signature using the STR header key, the STR header signature based on a STR table header and a random or pseudo-random value;
• generating a STR scatter/gather table signature using the STR scatter/gather table key, the STR scatter/gather table signature based on a STR scatter/gather table header and a random or pseudo-random value;
• generating a DRAM signature using the DRAM key and a value from a region of DRAM;
• and
• storing the STR header signature, the STR scatter/gather table signature and the DRAM signature in the STR data structure;
• and
• resume the processor system from the low-power mode when the STR data structure is valid based on a comparison of a first signature and a second signature, the first signature based on at least one of the STR header signature, the STR scatter/gather table signature or the DRAM signature, the second signature generated in response to a resume instruction.