Method of performing dynamic voltage and frequency scaling operation, application processor performing method, and mobile device comprising application processor

An application processor comprising:

• a central processing unit configured to operate based on a clock signal;
• a clock generating unit configured to generate the clock signal;
• and
• a clock management unit (CMU) configured to predict an operating state of the central processing unit, to provide operating frequency information to a power management integrated circuit (PMIC) based on the predicted operating state of the central processing unit, and to change an operating frequency of the application processor based on the predicted operating state of the central processing unit, the operating frequency information indicating a change of the operating frequency of the application processor corresponding to a frequency of the clock signal, wherein:
• an operating voltage of the application processor supplied by the PMIC is changed based on the operating frequency information,
• the clock generating unit comprises multiple phase locked loops (PLLs), a multiplexer, and a frequency divider,
• the frequency of the clock signal is determined such that an output frequency of one output signal selected by the multiplexer among multiple output signals output from the PLLs is divided by the frequency divider,
• the CMU increases the operating frequency of the application processor after the PMIC increases the operating voltage of the application processor when the operating frequency information indicates an increase of the operating frequency of the application processor, and
• the CMU decreases the operating frequency of the application processor before the PMIC decreases the operating voltage of the application processor when the operating frequency information indicates a decrease of the operating frequency of the application processor.

A mobile device comprising:

• at least one functional module;
• an application processor configured to predict an operating state of a central processing unit (CPU), to output operating frequency information based on a predicted operating state of the CPU, and to change an operating frequency of the application processor based on the predicted operating state of the CPU in hardware, the operating frequency information indicating a change of the operating frequency of the application processor;
• and
• a power management integrated circuit (PMIC) configured to change an operating voltage of the application processor based on the operating frequency information, wherein:
• the application processor comprises:
• the CPU configured to operate based on a clock signal;
• a clock generating unit configured to generate the clock signal, the clock generating unit comprises multiple phase locked loops (PLLs), a multiplexer, and a frequency divider, and wherein the frequency of the clock signal is determined such that an output frequency of one output signal selected by the multiplexer among multiple output signals output from the PLLs is divided by the frequency divider;
• and
• a clock management unit (CMU) configured to predict the operating state of the CPU, to provide the operating frequency information to the PMIC based on the predicted operating state of the CPU, and to change the operating frequency of the application processor based on the predicted operating state of the CPU,
• the CMU increases the operating frequency of the application processor after the PMIC increases the operating voltage of the application processor when the operating frequency information indicates an increase of the operating frequency of the application processor, and
• the CMU decreases the operating frequency of the application processor before the PMIC decreases the operating voltage of the application processor when the operating frequency information indicates a decrease of the operating frequency of the application processor.

A method of operating an apparatus comprising an application processor, a clock management unit (CMU), and a power management integrated circuit (PMIC), the method comprising:

• operating the CMU to predict an operating state of a central processing unit (CPU) in the application processor and to provide operating frequency information to the PMIC based on the predicted operating state;
• operating the PMIC to increase an operating voltage of the application processor before the CMU increases an operating frequency of the application processor when the operating frequency information indicates an increase in an operating frequency of the application processor;
• and
• operating the PMIC to decrease the operating voltage of the application processor after the CMU decreases the operating frequency of the application processor when the operating frequency information indicates a decrease in the operating frequency of the application processor, wherein:
• the operating frequency of the application processor corresponds to a frequency of a clock signal that is output from a clock generating unit, and the frequency of the clock signal is determined by the CMU,
• the clock generating unit comprises multiple phase locked loops (PLLs), a multiplexer, and a frequency divider, and
• the frequency of the clock signal is determined such that an output frequency of one output signal selected by the multiplexer among multiple output signals output from the PLLs is divided by the frequency divider.