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US 9,541,984 B2Granted
L2 flush and memory fabric teardown
AssigneeApple Inc.
InventorsShih-Chieh R. Wen, Jason M. Kassoff, Wei-Han Lien
Life of this patent
Estimating the term…
Abstract
A system and a method which include one or more processors, a memory coupled to at least one of the processors, a communication link coupled to the memory, and a power management unit. The power management unit may be configured to detect an inactive state of at least one of the processors. The power management unit may be configured to disable the communication link at a time after the processor enters the inactive state, and disable the memory at another time after the processor enters the inactive state.
Claims20
A system, comprising:
- a first memory;
- a second memory, different from the first memory;
- one or more processors coupled to the first memory;
- a communication link coupled to the one or more processors and to the second memory;
- and
- a power management unit configured to:
- detect an idle state of at least one processor of the one or more processors;
- disable at least a portion of the communication link in response to a determination that a first time period has elapsed since the idle state was detected;
- transfer at least a portion of data stored in the first memory to the second memory in response to a determination that a second time period has elapsed since the idle state was detected, wherein the second time period is greater than the first time period;
- wherein to transfer the at least a portion of the data, the power management unit is further configured to:
- re-enable the at least a portion of the communication link disabled after the first time period elapsed;
- transfer the at least a portion of the data via the at least a portion of the communication link;
- and
- disable the at least a portion of the communication link in response to a determination that the transfer of the at least a portion of the data is complete;
- and
- disable power to the first memory in response to the determination that the transfer of the at least a portion of the data is complete.
13 more elements
A method for managing power in a computing system, comprising:
- detecting that at least one processor of one or more processors has entered an inactive state;
- disabling at least a portion of a communication link in response to determining that a first time period has elapsed since detecting the inactive state of the at least one processor;
- transferring at least a portion of data stored in a first memory to a second memory in response to determining that a second time period has elapsed since detecting the inactive state of the at least one processor, wherein the second time period is greater than the first time period;
- wherein transferring the at least a portion of the data comprises:
- re-enabling the at least a portion of the communication link disabled after the first time period elapsed;
- transferring the at least a portion of the data via the at least a portion of the communication link;
- and
- disabling the at least a portion of the communication link in response to determining that transferring the at least a portion of the data has completed;
- and
- disabling power to the second memory in response to determining that transferring the at least a portion of the data has completed.
7 more elements
A device, comprising:
- a first memory;
- one or more processors coupled to the first memory;
- a communication link coupled to the one or more processors;
- and
- a control circuit configured to:
- receive a first value and a second value from an application running on the one or more processors, wherein the second value is greater than the first value;
- detect an inactive state of at least one processor of the one or more processors;
- disable at least a portion of the communication link in response to a determination that a first time period has elapsed since the inactive state was detected, wherein the first time period is dependent upon the first received value;
- transfer at least a portion of data stored in the first memory to a second memory in response to a determination that a second time period has elapsed since the inactive state was detected, wherein the second time period is dependent upon the second received value;
- wherein to transfer the at least a portion of the data, the control circuit is further configured to:
- re-enable the at least a portion of the communication link disabled after the first time period elapsed;
- transfer the at least a portion of the data via the at least a portion of the communication link;
- and
- disable the at least a portion of the communication link in response to a determination that the transfer of the at least a portion of the data is complete;
- and
- disable power to the first memory in response to the determination that the transfer of the at least a portion of the data is complete.
13 more elements
Dependencies are inferred from the claim text.