Periodic signal measurement using statistical sampling

An integrated circuit (IC) device comprising:

• at least one of a functional circuit and an embedded memory circuit fabricated on a semiconductor substrate and configured to operate in accordance with a system clock signal having a system clock frequency;
• and
• a periodic signal measurement circuit fabricated on the semiconductor substrate and configured to analyze, during a test period, a periodic signal having an associated duty cycle and is generated in accordance with operations of said at least one of said functional circuit and said embedded memory circuit, said periodic signal measurement circuit including:
• a reference signal generator configured to generate a reference signal such that a reference frequency of the reference signal is uncorrelated to the periodic signal;
• a sampling circuit configured to repeatedly detect a recurring signal feature of said reference signal, and to perform multiple sampling events at respective sample times determined by sequential detections of said recurring signal feature, wherein each sampling event of said multiple sampling events includes determining an asserted/de-asserted state of an associated signal phase of said periodic signal occurring at an associated sample time of said respective sample times determined by a detection of an associated recurring signal feature such that a probability of detecting an asserted state during any given said sampling event is proportional to the associated duty cycle of the periodic signal;
• a detection counter configured to generate a first count value such that said first count value only incrementally increases in response to each said sampling event occurring during said test period in which said periodic signal is determined to be in said asserted state;
• a sampling event counter configured to generate a second count value such that said second count value incrementally increases in response to every said sampling event occurring during said test period;
• and
• a control circuit configured to control said detection counter and said sampling event counter such that a statistically significant number of said multiple sampling events are performed during said test period such that a ratio of said first count value to said second count value at an end of said test period provides a statistically relevant measurement value of said associated duty cycle of the periodic signal.