# US 9,520,894 B1 · Signal encoding and compression with dynamic downsampling > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,520,894 B1 - Document ID: US9520894B1 - Status: Granted - Kind: B1 - Application number: 14/836,916 - Filed: 2015-08-26 - Granted: 2016-12-13 - Earliest claimed: 2015-08-26 - Assignees: The Boeing Company - Applicants: The Boeing Company - Inventors: Amir L. Liaghati - Web page: https://patentgrep.com/patent/US9520894B1 ## CPC - H03M 3/04: Differential modulation with several bits {, e.g. differential pulse code modulation [DPCM] (H03M3/30 takes precedence)} - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) ## Abstract A signal encoding and compression system with dynamic downsampling may include an encoder module configured to decimate a first digital signal, thereby producing a second digital signal. Each signal may then be DPCM-encoded. Decision logic may then be used to determine which encoded signal to provide as an output, based on a characteristic of the original signal. ## Claims ### Claim 1 A sensing system comprising: a transducer configured to convert sensed variations in a physical quantity to an analog electrical signal; an analog to digital converter (ADC) in communication with the transducer, the ADC configured to convert the analog electrical signal to a first digital signal having a first sampling rate and a plurality of first discrete-time values; and an encoder module in communication with the ADC, the encoder module configured to: decimate the first digital signal to produce a second digital signal having a second sampling rate and a plurality of second discrete-time values, generate a first set of first deltas, each first delta corresponding to a respective difference between one of the first discrete-time values and a selected first reference value, generate a second set of second deltas, each second delta corresponding to a respective difference between one of the second discrete-time values and a selected second reference value, and choose, based on a characteristic of the first digital signal, whether to output the first set or to output the second set. ### Claim 2 (depends on 1) The sensing system of claim 1, wherein the characteristic of the first digital signal is calculated by comparing the first deltas to a first threshold. ### Claim 3 (depends on 2) The sensing system of claim 2, wherein the characteristic of the first digital signal is a fraction of the set of first deltas that fall below the first threshold. ### Claim 4 (depends on 3) The sensing system of claim 3, wherein determining whether to output the first set or to output the second set includes comparing the fraction to a second threshold. ### Claim 5 (depends on 1) The sensing system of claim 1, wherein the first reference value is an immediately-previous one of the first discrete-time values. ### Claim 6 (depends on 1) The sensing system of claim 1, wherein, in response to choosing to output the first set, the encoder module is further configured to output the first set and a first flag. ### Claim 7 (depends on 1) The sensing system of claim 1, wherein, in response to choosing to output the second set, the encoder module is further configured to output the second set and a second flag. ### Claim 8 (depends on 1) The sensing system of claim 1, wherein choosing whether to output the first set or to output the second set is performed when the first set reaches a selected number of first deltas. ### Claim 9 A signal compression device utilizing differential pulse code modulation (DPCM), the device comprising: a controller having a processor and a memory, the controller configured to convert a received analog signal into a first digital signal; and a plurality of instructions stored in the memory and executable by the processor to: downsample the first digital signal to generate a second digital signal; produce a first DPCM-encoded signal based on the first digital signal, the first DPCM-encoded signal having a plurality of first values; store the plurality of first values in a first buffer; produce a second DPCM-encoded signal based on the second digital signal, the second DPCM-encoded signal having a plurality of second values; store the plurality of second values in a second buffer; determine a characteristic of the first digital signal; generate a first output including the first values from the first buffer when the characteristic meets first criteria; and generate a second output including the second values from the second buffer when the characteristic meets second criteria. ### Claim 10 (depends on 9) The device of claim 9, wherein the first criteria and the second criteria are mutually exclusive. ### Claim 11 (depends on 9) The device of claim 9, wherein the characteristic of the first digital signal is calculated by comparing the first values to a first threshold. ### Claim 12 (depends on 11) The device of claim 11, wherein the characteristic of the first digital signal is the fraction of the plurality of first values that fall below the first threshold. ### Claim 13 (depends on 9) The device of claim 9, wherein the first output further includes a first flag indicating that the first values correspond to the first DPCM-encoded signal. ### Claim 14 (depends on 9) The device of claim 9, wherein the second output further includes a second flag indicating that the second values correspond to the second DPCM-encoded signal. ### Claim 15 (depends on 9) The device of claim 9, wherein the first digital sample has a fixed sampling rate. ### Claim 16 A method for compressing and encoding a digital signal using differential pulse-code modulation (DPCM), the method comprising: receiving, by a controller of a signal compression device, an analog input signal; converting the analog input signal to a corresponding digital input signal using an analog-to-digital converter of the controller; generating, using a processor of the controller, a first DPCM-encoded signal based on the digital input signal; downsampling the digital input signal, using the processor, to produce a decimated signal; generating, using the processor, a second DPCM-encoded signal based on the decimated signal; and transmitting an output signal from the controller; wherein the processor automatically switches the output signal between the first DPCM-encoded signal and the second DPCM-encoded signal based on a characteristic of the digital input signal. ### Claim 17 (depends on 16) The method of claim 16, further including determining, using the processor, the characteristic of the digital input signal by calculating the fraction of delta values of the first DPCM-encoded signal that fall below a first threshold. ### Claim 18 (depends on 17) The method of claim 17, wherein switching between the first DPCM-encoded signal and the second DPCM-encoded signal based on the characteristic of the digital input signal includes comparing the fraction to a second threshold. ### Claim 19 (depends on 16) The method of claim 16, wherein transmitting the output signal includes transmitting a flag when the output signal automatically switches between the first DPCM-encoded signal and the second DPCM-encoded signal. ### Claim 20 (depends on 16) The method of claim 16, wherein converting the analog input signal to a corresponding digital input signal comprises selecting a sample rate based on expected characteristics of the digital input signal.