# US 9,520,881 B1 · Systems and methods for tuning an oscillator frequency > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,520,881 B1 - Document ID: US9520881B1 - Status: Granted - Kind: B1 - Application number: 14/927,803 - Filed: 2015-10-30 - Granted: 2016-12-13 - Earliest claimed: 2015-10-30 - Assignees: Texas Instruments Incorporated - Applicants: Texas Instruments Incorporated - Inventors: Abhijit Kumar Das; Krishnasawamy Nagaraj; Rahul Bhandarkar - Web page: https://patentgrep.com/patent/US9520881B1 ## CPC - H03L 7/02: using a frequency discriminator comprising a passive frequency-determining element - H03K 3/011: Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature {(to maintain energy constant H03K3/015)} - H03K 3/0231: Astable circuits {(H03K3/0315 takes precedence)} - H03L 7/089: the phase or frequency detector generating up-down pulses (H03L7/087 takes precedence) - H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract A system for tuning an oscillator frequency. The system includes a trimmed calibration circuit comprising a comparator and trimmed delay element and calibration logic. The calibration logic is configured to receive an output of the comparator and control an on time and an off time of an oscillator based on the output of the comparator. ## Claims ### Claim 1 A system for tuning an oscillator frequency, comprising: a trimmed calibration circuit comprising a comparator and trimmed delay element; and calibration logic configured to: receive an output of the comparator; and control an on time and an off time of an oscillator based on the output of the comparator; wherein the calibration logic is further configured to: receive a clock signal from the oscillator comprising the on time and off time of the oscillator; monitor the output of the comparator during a charging cycle of the trimmed calibration circuit and: decrease the off time of the oscillator as a result of the comparator output being high at an end of the off time of the oscillator; or increase the off time of the oscillator as a result of the comparator output being low at the end of the off time of the oscillator; and monitor the output of the comparator during a discharging cycle of the trimmed calibration circuit and: increase the on time of the oscillator as a result of the comparator output being high an end of the on time period of the oscillator; or decrease the on time of the oscillator as a result of the comparator output being low at the end of the on time period of the oscillator. ### Claim 2 (depends on 1) The system of claim 1 wherein: the charging cycle of the trimmed calibration circuit is from a reference voltage to a comparison voltage of the comparator that includes a comparator offset voltage; and the discharging cycle of the trimmed calibration circuit is from a complimentary reference voltage to the comparison voltage of the comparator including the comparator offset voltage. ### Claim 3 (depends on 2) The system of claim 2 wherein the reference voltage comprises a ground voltage and the complimentary reference voltage comprises a supply voltage. ### Claim 4 A system for tuning an oscillator frequency, comprising: a trimmed calibration circuit comprising a comparator and trimmed delay element; and calibration logic configured to: receive an output of the comparator; and control an on time and an off time of an oscillator based on the output of the comparator; wherein the calibration logic is further configured to power down the trimmed calibration circuit as a result of the on and off times of the oscillator reaching a predetermined level of calibration; wherein the calibration logic is further configured to power up the trimmed calibration circuit in response to the on or off time of the oscillator deviating from the predetermined level of calibration. ### Claim 5 A system for tuning an oscillator frequency, comprising: a trimmed calibration circuit comprising a comparator and trimmed delay element; and calibration logic configured to: receive an output of the comparator; and control an on time and an off time of an oscillator based on the output of the comparator; wherein the calibration logic is further configured to power down the trimmed calibration circuit as a result of the on and off times of the oscillator reaching a predetermined level of calibration; wherein the calibration logic is further configured to power up the trimmed calibration circuit in response to an indication of a change in temperature above a predetermined threshold. ### Claim 6 A system for tuning an oscillator frequency, comprising: a trimmed calibration circuit comprising a comparator and trimmed delay element; and calibration logic configured to: receive an output of the comparator; and control an on time and an off time of an oscillator based on the output of the comparator; wherein the calibration logic is further configured to power down the trimmed calibration circuit as a result of the on and off times of the oscillator reaching a predetermined level of calibration; wherein the calibration logic is further configured to power up the trimmed calibration circuit in response to an indication of a change in supply voltage above a predetermined threshold. ### Claim 7 A system for tuning an oscillator frequency, comprising: a trimmed calibration circuit comprising a comparator and a trimmed delay element; and calibration logic configured to: receive an output of the comparator; and control an on time and an off time of an oscillator based on the output of the comparator; wherein a charging cycle of the trimmed calibration circuit is from a reference voltage to a comparison voltage of the comparator that includes a comparator offset voltage; and wherein a discharging cycle of the trimmed calibration circuit is from a complimentary reference voltage to the comparison voltage of the comparator including the comparator offset voltage. ### Claim 8 (depends on 7) The system of claim 7 wherein the calibration logic is further configured to: receive a clock signal from the oscillator comprising the on time and off time of the oscillator; monitor the output of the comparator during the charging cycle of the trimmed calibration circuit and: decrease the off time of the oscillator as a result of the comparator output being high at an end of the off time of the oscillator; or increase the off time of the oscillator as a result of the comparator output being low at the end of the off time of the oscillator; and monitor the output of the comparator during the discharging cycle of the trimmed calibration circuit and: increase the on time of the oscillator as a result of the comparator output being high an end of the on time period of the oscillator; or decrease the on time of the oscillator as a result of the comparator output being low at the end of the on time period of the oscillator. ### Claim 9 (depends on 7) The system of claim 7 wherein the reference voltage comprises a ground voltage and the complimentary reference voltage comprises a supply voltage. ### Claim 10 (depends on 7) The system of claim 7 wherein the calibration logic is configured to control the on and off times of the oscillator through adjustment of an RC time constant or a comparison voltage of the oscillator. ### Claim 11 (depends on 7) The system of claim 7 wherein the calibration logic is further configured to power down the trimmed calibration circuit as a result of the on and off times of the oscillator reaching a predetermined level of calibration. ### Claim 12 (depends on 7) The system of claim 7 wherein the calibration logic is further configured to power up the trimmed calibration circuit in response to the on or off time of the oscillator deviating from the predetermined level of calibration. ### Claim 13 (depends on 7) The system of claim 7 wherein the calibration logic is further configured to power up the trimmed calibration circuit in response to an indication of a change in temperature or a change in supply voltage above a predetermined threshold. ### Claim 14 A method for tuning an oscillator frequency, comprising: initiating a charging cycle of a trimmed calibration circuit from a reference voltage to a comparison voltage of a comparator that includes a comparator offset voltage; initiating a discharging cycle of the trimmed calibration circuit from a complimentary reference voltage to the comparison voltage of the comparator including the comparator offset voltage; controlling an on time and an off time of an oscillator based on the output of the comparator. ### Claim 15 (depends on 14) The method of claim 14 further comprising: receiving a clock signal from the oscillator comprising the on time and off time of the oscillator; monitoring the output of the comparator during the charging cycle of the trimmed calibration circuit and: decreasing the off time of the oscillator as a result of the comparator output being high at an end of the off time of the oscillator; or increasing the off time of the oscillator as a result of the comparator output being low at the end of the off time of the oscillator; and monitoring the output of the comparator during the discharging cycle of the trimmed calibration circuit and: increasing the on time of the oscillator as a result of the comparator output being high an end of the on time period of the oscillator; or decreasing the on time of the oscillator as a result of the comparator output being low at the end of the on time period of the oscillator. ### Claim 16 (depends on 14) The method of claim 14 further comprising powering down the trimmed calibration circuit as a result of the on and off times of the oscillator reaching a predetermined level of calibration.