# US 9,520,868 B2 · Power transistor driving circuits and methods for switching mode power supplies > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,520,868 B2 - Document ID: US9520868B2 - Status: Granted - Kind: B2 - Application number: 13/862,289 - Filed: 2013-04-12 - Published: 2013-08-29 - Granted: 2016-12-13 - Earliest claimed: 2009-11-20 - Assignees: BCD Semiconductor Manufacturing Limited - Applicants: BCD Semiconductor Manufacturing Limited - Inventors: Jinhua Duan; Qiang Zong; Yajiang Zhu - Web page: https://patentgrep.com/patent/US9520868B2 ## CPC - H03K 17/16: Modifications for eliminating interference voltages or currents - H02M 3/33507: {with automatic control of the output voltage or current, e.g. flyback converters (H02M3/33561, H02M3/33569 take precedence)} - H03K 17/04123: {in field-effect transistor switches} - G05F 3/26: Current mirrors - G05F 3/267: {using both bipolar and field-effect technology} - G05F 3/30: Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities (G05F3/26 takes precedence) - H03K 2217/0036: Means reducing energy consumption - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) - G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES ## Abstract A power supply controller is provided for providing a drive current to a control terminal of a power transistor in three time intervals. The controller includes control circuits configured to control the drive current in multiple stages. During a first time interval, first drive current includes a current spike for turning on the power transistor in response to a start of the control signal pulse. During a second time interval, a second drive current includes a ramping current substantially proportional to a magnitude of a current through the power transistor. During a third time interval, current flow to the power transistor is at least partially turned off before an end of the control signal pulse. ## Claims ### Claim 1 A driver circuit, the driver circuit comprising: a current mirror having first and second PMOS transistors; a bipolar transistor coupled to the second PMOS transistor of the current mirror to receive a first current; and a plurality of serially connected diode devices coupled between a collector and a base of the bipolar transistor; wherein the collector of the bipolar transistor is configured to provide a driving voltage according to the number of the plurality of serially-connected diode devices and the size ratio between the first and the second PMOS transistors. ### Claim 2 (depends on 1) The driver circuit of claim 1, further comprising: an input terminal coupled to the first PMOS transistor of the current mirror for receiving a timing signal; an MOS transistor coupled between the input terminal and a ground terminal; and a resistor and a capacitor coupled in series between a gate of the MOS transistor and the ground terminal. ### Claim 3 A method for turning off a first bipolar transistor, comprising: coupling an MOS transistor to a base of the first bipolar transistor; during a first time period in response to a first control signal, applying a first voltage to a gate of the MOS transistor to discharge the first bipolar transistor; and during a second time period in response to a second control signal, applying a second voltage to the gate of the MOS transistor to discharge the first bipolar transistor, the second voltage being lower than the first voltage. ### Claim 4 (depends on 3) The method of claim 3, further comprising: deriving the first voltage from a plurality of serially connected diode devices and a base-emitter voltage of a second bipolar transistor; wherein the second bipolar transistor includes a collector coupled to a gate of the MOS transistor; and the plurality of serially connected diode devices are coupled between and base of the second bipolar transistor. ### Claim 5 A driver circuit for turning off a first bipolar transistor, the driver circuit comprising: a current mirror having first and second PMOS transistors; a second bipolar transistor coupled to the second PMOS transistor of the current mirror; a plurality of diode devices coupled in series between a collector and a base of the second bipolar transistor; and a first MOS transistor having a gate terminal coupled to the collector of the second bipolar transistor and a drain terminal for coupling to a control terminal of the first bipolar transistor for turning off the first bipolar transistor. ### Claim 6 (depends on 5) The circuit of claim 5, wherein the collector terminal of the second bipolar transistor is configured, in response to a first control signal, to provide a first voltage to a gate of the first MOS transistor to provide a driving current to the control terminal of the first bipolar transistor for discharging the first bipolar transistor. ### Claim 7 (depends on 6) The circuit of claim 6, wherein the first MOS transistor is configured to be coupled to a second voltage in response to a second control signal, the second voltage being lower than the first voltage. ### Claim 8 (depends on 7) The circuit of claim 7, further comprising: an input terminal coupled to the current mirror for receiving the first control signal; a second MOS transistor coupled between the input terminal and a ground terminal; and a resistor and a capacitor coupled in series between a gate of the MOS transistor and the ground terminal.