# US 9,520,562 B2 · Method of making a resistive random access memory

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 9,520,562 B2
- Document ID: US9520562B2
- Status: Granted
- Kind: B2
- Application number: 14/334,536
- Filed: 2014-07-17
- Published: 2015-01-22
- Granted: 2016-12-13
- Earliest claimed: 2013-07-19
- Assignees: ASM IP Holding B.V.
- Applicants: ASM IP Holding B.V.
- Inventors: Qi Xie; Jan Willem Maes; Tom Blomberg; Marko Tuominen; Suvi Haukka; Robin Roelofs; Jacob Woodruff
- Web page: https://patentgrep.com/patent/US9520562B2

## CPC

- H10N 70/023: {by chemical vapor deposition, e.g. MOCVD, ALD}
- H10B 63/845: {the switching components being connected to a common vertical conductor}
- H10N 70/021: {Formation of switching materials, e.g. deposition of layers}
- H10N 70/24: {based on migration or redistribution of ionic species, e.g. anions, vacancies}
- H10N 70/245: {the species being metal cations, e.g. programmable metallization cells}
- H10N 70/801: {Constructional details of multistable switching devices}
- H10N 70/823: {adapted for essentially horizontal current flow, e.g. bridge type devices}
- H10N 70/8416: {adapted for supplying ionic species}
- H10N 70/881: {Switching materials}
- H10N 70/8833: {Binary metal oxides, e.g. TaOx}
- H10P 14/6339: {deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD}
- H10P 14/6939: {characterised by the metal}
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B: ELECTRONIC MEMORY DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

The disclosed technology generally relates to semiconductor devices, and relates more particularly to resistive random access memory devices and methods of making the same. In one aspect, a method of forming a resistive random access memory cell of a random access memory device includes forming a first electrode and forming a resistive switching material comprising an oxide of a pnictogen element by atomic layer deposition. The method additionally includes forming a metallic layer comprising the pnictogen element by atomic layer deposition (ALD). The resistive switching material is interposed between the first electrode and the metallic layer.

## Claims

### Claim 1

A method of forming a resistive random access memory device, comprising forming a resistive random access memory cell, wherein forming the resistive random access memory cell comprises:
providing a first electrode;
forming a resistive switching material comprising an oxygen and a pnictogen element by atomic layer deposition, wherein forming the resistive switching material by atomic layer deposition comprises alternatingly exposing a deposition surface to a pnictogen precursor and an oxygen precursor at different times; and
forming a metallic layer comprising the pnictogen element by atomic layer deposition,
wherein the resistive switching material is interposed between the first electrode and the metallic layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein forming the resistive switching material comprises depositing the resistive switching material by thermal atomic layer deposition.

### Claim 3 (depends on 1)

The method of claim 1, wherein the pnictogen is Sb.

### Claim 4 (depends on 3)

The method of claim 3, wherein the resistive switching material comprises SbOx.

### Claim 5 (depends on 3)

The method of claim 3, wherein depositing the metallic layer comprises using precursors comprising one of Sb halides, Sb alkoxides, Sb alkylamides and Sb alkylsilyls.

### Claim 6 (depends on 5)

The method of claim 5, wherein depositing the metallic layer comprises using an Sb alkylsilyl as a first precursor in combination with a second precursor comprising one of Sb halides, Sb alkoxides and Sb alkylamides.

### Claim 7 (depends on 3)

The method of claim 3, wherein forming the resistive switching material comprises using precursors comprising ozone and one of Sb halides, Sb alkoxides, and Sb alkylamides.

### Claim 8 (depends on 1)

The method of claim 1, wherein the metallic layer is in physical contact with the resistive switching material.

### Claim 9 (depends on 1)

The method of claim 1, further comprising:
providing a sacrificial layer over a substrate surface;
forming a hole extending vertically through the sacrificial layer;
forming a second electrode comprising filling the hole with a second electrode material;
removing the sacrificial layer to form a recess; and
forming the resistive switching material comprising lining the recess with a resistive switching material by depositing an oxide of a pnictogen element by atomic layer deposition.

### Claim 10

A method of forming a resistive random access memory cell, comprising:
forming a first electrode;
forming a barrier layer comprising a metal oxide over the first electrode;
forming a resistive switching material over the barrier layer by atomic layer deposition,
wherein forming the resistive switching material by atomic layer deposition comprises exposing a deposition surface to a precursor comprising a pnictogen element;
forming a metallic layer over the resistive switching material by atomic layer deposition; and
wherein the barrier layer and the resistive switching material are interposed between the first electrode and the metallic layer.

### Claim 11 (depends on 10)

The method of claim 10, wherein forming the barrier layer comprises forming the barrier layer interposed between the first electrode and the resistive switching material.

### Claim 12 (depends on 11)

The method of claim 11, wherein the barrier layer comprises a metal oxide chosen from a group consisting of silicon oxide, hafnium oxide, aluminum oxide, zirconium oxide, tantalum oxide, titanium oxide.

### Claim 13 (depends on 12)

The method of claim 12, wherein the resistive switching material comprises an oxide of the pnictogen element.

### Claim 14 (depends on 13)

The method of claim 13, wherein forming the resistive switching material comprises depositing by thermal atomic layer deposition.

### Claim 15 (depends on 14)

The method of claim 14, wherein the pnictogen element is Sb.

### Claim 16 (depends on 15)

The method of claim 15, wherein the metallic layer comprises a pnictogen element.

### Claim 17 (depends on 16)

The method of claim 16, wherein forming the metallic layer comprises depositing the metallic layer by thermal atomic layer deposition.

### Claim 18 (depends on 17)

The method of claim 17, wherein the metallic layer comprises Sb.

### Claim 19 (depends on 18)

The method of claim 18, wherein forming the barrier layer comprises depositing by thermal atomic layer deposition.

### Claim 20

A resistive random access memory device comprising a memory cell, the memory cell comprising:
a first electrode comprising TiN;
metallic layer comprising a pnictogen element; and
a resistive switching material comprising an oxide of a pnictogen element,
wherein the resistive switching material is interposed between the first electrode and the metallic layer,
wherein the resistive random access memory device comprises a plurality of first electrodes formed at different vertical levels, and
wherein the device further comprises a second electrode including a vertically-extending conductive rod.

### Claim 21 (depends on 20)

The resistive random access memory device of claim 20, wherein the first electrode is disposed over a surface of a substrate, the first electrode having a major surface substantially parallel to the surface of the substrate and a hole extending vertically therein, and wherein the resistive switching material lines sidewall surfaces of the hole.

### Claim 22 (depends on 21)

The resistive random access memory device of claim 21, wherein the pnictogen element for the metallic layer is Sb.

### Claim 23 (depends on 22)

The resistive random access memory device of claim 22, wherein the pnictogen element for the resistive switching material is Sb.

### Claim 24

A method of forming a random access memory cell, comprising:
providing a first electrode;
forming by atomic layer deposition a resistive switching material comprising a nanolaminate layer comprising a plurality of alternating elemental pnictogen layers and pnictogen oxide layers; and
providing a second electrode,
wherein the resistive switching material is interposed between the first electrode and the second electrode.

### Claim 25 (depends on 24)

The method of claim 24, wherein the pnictogen layers are Sb layers and pnictogen oxide layers are SbOx layers.

### Claim 26 (depends on 25)

The method of claim 25, further comprising a barrier layer comprising a metal oxide interposed between the resistive switching material and the first electrode.

### Claim 27

A method of fabricating a resistive random access memory cell, comprising:
providing a substrate;
providing a first electrode on the substrate;
forming via atomic layer deposition a resistive switching material over the first electrode, wherein the resistive switching material comprises an oxide; and
depositing via atomic layer deposition a metallic layer on the resistive switching material, wherein the metallic layer comprises:
a metal; and
a pnictogen chosen from the group consisting of As, Bi, Sb, and P,
wherein depositing via atomic layer deposition comprises exposing the substrate to a precursor comprising the pnictogen between exposures to a precursor comprising the metal.

### Claim 28 (depends on 27)

The method of claim 27, further comprising forming a second electrode on the metallic layer such that the metallic layer contacts and is interposed between the resistive switching material and the second electrode.

### Claim 29 (depends on 27)

The method of claim 27, wherein forming the resistive switching material comprises depositing the resistive switching material by thermal atomic layer deposition.

### Claim 30 (depends on 29)

The method of claim 29, wherein a deposition temperature for the thermal atomic layer deposition is between about 100° C. and about 400° C.

### Claim 31 (depends on 27)

The method of claim 27, further comprising forming a second resistive switching material on the metallic layer such that the metallic layer is interposed between the resistive switching material and the second resistive switching material.

### Claim 32 (depends on 27)

The method of claim 27, wherein forming the metallic layer comprises depositing the metallic layer by thermal atomic layer deposition at a temperature less than about 250° C.

### Claim 33 (depends on 27)

The method of claim 27, wherein forming the first electrode includes depositing a TiN layer.

### Claim 34 (depends on 33)

The method of claim 33, wherein the resistive switching material is in physical contact with the first electrode after forming a resistive switching material.

### Claim 35 (depends on 34)

The method of claim 34, wherein forming the first electrode comprises depositing the TiN layer at a temperature of about 400° C. or less.

### Claim 36 (depends on 33)

The method of claim 33, wherein forming the first electrode comprises depositing the TiN layer by atomic layer deposition using precursors comprising TiCl4 and NH3.

### Claim 37 (depends on 27)

The method of claim 27, further comprising forming a second electrode.

### Claim 38 (depends on 37)

The method of claim 37, wherein forming the second electrode comprises depositing the second electrode such that the second electrode is in physical contact with the metallic layer.

### Claim 39 (depends on 37)

The method of claim 37, wherein forming the second electrode comprises depositing a TiN layer at a temperature of about 400° C. or less.

### Claim 40 (depends on 27)

The method of claim 27, wherein the metallic layer constitutes a second electrode.

### Claim 41 (depends on 27)

The method of claim 27, wherein the memory cell does not include a noble metal.

### Claim 42 (depends on 27)

The method of claim 27, wherein providing the first electrode comprises providing a plurality of vertically-spaced apart first electrode layers, further comprising:
forming a hole extending vertically through the plurality of first electrode layers,
wherein forming the resistive switching material comprises lining sidewalls of the hole with the resistive switching material by depositing the oxide of a pnictogen element by atomic layer deposition, and
wherein forming the metallic layer comprises forming the metallic layer comprising the pnictogen directly adjacent the resistive switching material.

### Claim 43 (depends on 42)

The method of claim 42, wherein the hole has an aspect ratio exceeding about 20:1.

### Claim 44 (depends on 42)

The method of claim 42, wherein surfaces of the sidewalls comprise a heterogeneous composition.

### Claim 45 (depends on 44)

The method of claim 44, wherein surfaces of the sidewall has alternating insulating regions and conductive regions through the first electrode layers.

### Claim 46 (depends on 27)

The method of claim 27, wherein the resistive switching layer has a concentration of the pnictogen, the method further comprising forming a graded interface region interposed between the resistive switching material and the metallic layer, wherein the interface region has a concentration of the pnictogen between a concentration of the pnictogen of the metallic layer and the concentration of the pnictogen of the resistive switching layer.

### Claim 47 (depends on 46)

The method of claim 46, wherein the interface region comprises a nanolaminate layer comprising alternating layers of the oxide of the pnictogen and layers of the pnictogen, wherein a concentration of the pnictogen in the interface region increases from a first side to a second side of the interface region.

### Claim 48

A method of fabricating a resistive random access memory cell, comprising:
providing a substrate;
providing a first electrode on the substrate;
forming via atomic layer deposition a resistive switching material over the first electrode, wherein the resistive switching material comprises a non-pnictogen oxide; and
doping the oxide with a metallic material comprising:
a metal; and
a pnictogen chosen from the group consisting of As, Bi, Sb, and P.

### Claim 49

A method of fabricating a resistive random access memory cell, comprising:
providing a substrate;
providing a first electrode on the substrate;
depositing via atomic layer deposition a metallic layer over the first electrode, wherein the metallic layer comprises a pnictogen chosen from the group consisting of As, Bi, Sb, and P,
wherein depositing via atomic layer deposition comprises exposing the substrate to a precursor comprising the pnictogen while depositing the metallic layer; and
forming via oxidation of the metallic layer a resistive switching material over the first electrode.

### Claim 50 (depends on 49)

The method of claim 49, further comprising forming a second electrode over the resistive switching material.

### Claim 51 (depends on 49)

The method of claim 49, wherein depositing via atomic layer deposition comprises depositing the metallic layer by thermal atomic layer deposition.

### Claim 52 (depends on 49)

The method of claim 49, wherein forming the resistive switching material comprises oxidizing using one of ozone or H2O.

### Claim 53 (depends on 52)

The method of claim 52, oxidizing using ozone comprises oxidizing at a temperature between about 100° C. and about 400° C.

### Claim 54 (depends on 49)

The method of claim 49, further comprising forming a multi-layer resistive switching stack, comprising:
depositing a second metallic layer on the resistive switching material via atomic layer deposition; and
forming a second resistive switching material via oxidation of the second metallic layer.

### Claim 55 (depends on 54)

The method of claim 54, wherein thicknesses of the metallic layers or the resistive switching materials are different from one another such that a concentration gradient in the pnictogen is created across a thickness of the multi-layer resistive switching stack.

### Claim 56 (depends on 55)

The method of claim 55, wherein the resistive switching material and the second resistive switching material are a same material.