# US 9,520,478 B2 · Methods of forming diodes

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- Number: US 9,520,478 B2
- Document ID: US9520478B2
- Status: Granted
- Kind: B2
- Application number: 14/959,884
- Filed: 2015-12-04
- Published: 2016-03-24
- Granted: 2016-12-13
- Earliest claimed: 2008-06-18
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Gurtej S. Sandhu; Chandra Mouli
- Web page: https://patentgrep.com/patent/US9520478B2

## CPC

- H10D 8/053: {of heterojunction diodes or of tunnel diodes}
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- H10D 8/051: {of Schottky diodes}
- H10D 8/60: Schottky-barrier diodes
- H10D 8/70: Tunnel-effect diodes
- H10D 62/118: {Nanostructure semiconductor bodies}
- H10D 62/121: {oriented parallel to substrates}
- H10D 62/122: {oriented at angles to substrates, e.g. perpendicular to substrates}
- H10D 62/123: {comprising junctions}
- H10D 62/13: Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D 64/011: {of electrodes ohmically coupled to a semiconductor}
- H10D 64/23: Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10N 70/00: Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching (integrated devices or assemblies of multiple devices H10N79/00)
- H10P 14/40: of conductive or resistive materials
- H10D 1/716: {having vertical extensions}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is deposited along an undulating topography that extends across the pedestal and base, and a second electrode is formed over the least one layer. The first electrode, at least one layer, and second electrode together form a structure that conducts current between the first and second electrodes when voltage of one polarity is applied to the structure, and that inhibits current flow between the first and second electrodes when voltage having a polarity opposite to said one polarity is applied to the structure. Some embodiments include diodes having a first electrode that contains two or more projections extending upwardly from a base, having at least one layer over the first electrode, and having a second electrode over the at least one layer.

## Claims

### Claim 1

A method of forming a diode, comprising:
etching an opening that extends through an insulative material and to a conductive base;
forming at least one sidewall spacer along sidewalls of the opening to narrow the opening, the base being exposed along a bottom of the narrowed opening;
dispersing seed material along the bottom of the narrowed opening; and growing pedestals from the dispersed seed material;
removing the at least one sidewall spacer after dispersing the seed material;
depositing one or more layers across the pedestals to form the first electrode of the diode; and
forming a second electrode over said one or more layers to form the diode.

### Claim 2 (depends on 1)

The method of claim 1 wherein the dispersed seed material consists of nanocrystalline seeds.

### Claim 3 (depends on 1)

The method of claim 1 wherein the one or more pedestals are comprised of the same composition as the base.

### Claim 4 (depends on 1)

The method of claim 1 wherein the one or more pedestals comprise at least one composition that is not comprised by the base.

### Claim 5 (depends on 1)

The method of claim 1 wherein the one or more layers are at least two layers.

### Claim 6 (depends on 1)

The method of claim 1 wherein the etching the opening comprises anisotropically etching.