# US 9,520,476 B2 · Semiconductor device and method for producing same

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- Number: US 9,520,476 B2
- Document ID: US9520476B2
- Status: Granted
- Kind: B2
- Application number: 14/375,912
- Filed: 2013-01-24
- Published: 2014-12-11
- Granted: 2016-12-13
- Earliest claimed: 2012-01-31
- Assignees: Sharp Kabushiki Kaisha
- Applicants: Sharp Kabushiki Kaisha
- Inventors: Tadayoshi Miyamoto; Kazuatsu Ito; Shigeyasu Mori; Mitsunobu Miyamoto; Yasuyuki Ogawa; Makoto Nakazawa; Seiichi Uchida; Takuya Matsuo
- Web page: https://patentgrep.com/patent/US9520476B2

## CPC

- H10D 30/6739: {Conductor-insulator-semiconductor electrodes}
- H10D 30/6704: {having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 64/011: {of electrodes ohmically coupled to a semiconductor}
- H10D 86/0221: {comprising manufacture, treatment or patterning of TFT semiconductor bodies}
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/60: wherein the TFTs are in active matrices
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10K 59/1213: {the pixel elements being TFTs}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

A semiconductor device (100A) includes a substrate (2), an oxide semiconductor layer (5) formed on the substrate (2), source and drain electrodes (6s, 6d) electrically connected to the oxide semiconductor layer (5), a first transparent electrode (7) electrically connected to the drain electrode (6d), a dielectric layer (8) formed on the source and drain electrodes (6s, 6d), and a second transparent electrode (9) formed on the dielectric layer (8). The upper and/or lower surface(s) of the first transparent electrode (7) contacts with a reducing insulating layer (8a) with the property of reducing an oxide semiconductor included in the oxide semiconductor layer (5). The second transparent electrode (9) overlaps at least partially with the first transparent electrode (7) via the dielectric layer (8). The oxide semiconductor layer (5) and the first transparent electrode (7) are formed out of the same oxide film.

## Claims

### Claim 1

A semiconductor device comprising:
a substrate;
a gate electrode on the substrate;
a gate insulating layer located over the gate electrode;
an oxide semiconductor layer on the gate insulating layer;
source and drain electrodes electrically connected to the oxide semiconductor layer;
a first transparent electrode electrically connected to the drain electrode, the first transparent electrode being a pixel electrode;
a dielectric layer located over the source and drain electrodes; and
a second transparent electrode on the dielectric layer, wherein
at least a portion of the second transparent electrode overlaps with the first transparent electrode with the dielectric layer interposed between them,
a lower surface of the first transparent electrode contacts with a reducing insulating layer which has a property of reducing an oxide semiconductor included in the oxide semiconductor layer,
the reducing insulating layer does not contact with a channel region of the oxide semiconductor layer, and
the oxide semiconductor layer and the first transparent electrode are made of the same oxide film.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the dielectric layer includes the reducing insulating layer which contacts with the upper surface of the first transparent electrode; and an oxide insulating layer which contacts with the channel region of the oxide semiconductor layer.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the gate insulating layer includes the reducing insulating layer which contacts with the lower surface of the first transparent electrode; and an oxide insulating layer which contacts with a lower surface of the oxide semiconductor layer.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein
the drain electrode is on the first transparent electrode, and
the first transparent electrode contacts directly with the drain electrode.

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein when viewed along a normal to the substrate, an end portion of the reducing insulating layer overlaps with the drain electrode.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, wherein the oxide film includes In, Ga and Zn.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein the oxide semiconductor layer includes an In—Ga—Zn—O based semiconductor.

### Claim 8 (depends on 1)

The semiconductor device of claim 1, wherein the reducing insulating layer includes an upper reducing insulating layer which contacts with the upper surface of the first transparent electrode and a lower reducing insulating layer which contacts with the lower surface of the first transparent electrode.

### Claim 9 (depends on 1)

A method for fabricating the semiconductor device of claim 1, the method comprising the steps of:
(a) providing the substrate;
(b) forming the gate electrode and the gate insulating layer on the substrate;
(c) forming the oxide semiconductor film on the gate insulating layer;
(d) forming the source and drain electrodes on the oxide semiconductor film;
(e) forming the dielectric layer over the source and drain electrodes;
(f1) forming, either before or after the step (c), a reducing insulating layer which contacts with a portion of the oxide semiconductor film and which has a property of reducing an oxide semiconductor included in the oxide semiconductor film; and
(f2) after the steps (c) and (f1), forming the first transparent electrode in a portion of the oxide semiconductor film which contacts with the reducing insulating layer and also forming the oxide semiconductor layer in the rest of the oxide semiconductor film which has not been reduced; and
(g) forming the second transparent electrode on the dielectric layer, at least a portion of the second transparent electrode overlapping with the first transparent electrode with the dielectric layer interposed between them.

### Claim 10 (depends on 9)

The method of claim 9, wherein the reducing insulating layer is a portion of the gate insulating layer, and the step (b) includes the step (f1).

### Claim 11 (depends on 9)

The method of claim 9, wherein the reducing insulating layer is a portion of the dielectric layer, and the step (e) includes the step (f1).

### Claim 12 (depends on 9)

The method of claim 9, wherein at least one of the dielectric layer and the gate insulating layer includes an oxide insulating layer, and
the oxide insulating layer contacts with the oxide semiconductor layer.

### Claim 13 (depends on 9)

The method of claim 9, wherein when viewed along a normal to the substrate, an end portion of the reducing insulating layer overlaps with the drain electrode.

### Claim 14 (depends on 9)

The method of claim 9, wherein the oxide semiconductor film includes an In—Ga—Zn—O based semiconductor.