# US 9,520,472 B2 · Growth of cubic crystalline phase strucure on silicon substrates and devices comprising the cubic crystalline phase structure

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- Number: US 9,520,472 B2
- Document ID: US9520472B2
- Status: Granted
- Kind: B2
- Application number: 14/383,833
- Filed: 2013-03-15
- Published: 2015-04-23
- Granted: 2016-12-13
- Earliest claimed: 2012-05-04
- Assignees: Stc.Unm
- Applicants: Stc.Unm
- Inventors: Steven R. J. Brueck; Seung-Chang Lee; Christian Wetzel; Theeradetch Detchprohm; Christoph Stark
- Web page: https://patentgrep.com/patent/US9520472B2

## CPC

- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D 62/815: of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW]
- H10H 20/817: characterised by the crystal structures or orientations, e.g. polycrystalline, amorphous or porous
- H10H 20/821: of the light-emitting regions, e.g. non-planar junctions
- H10P 14/2905: {Silicon, silicon germanium or germanium}
- H10P 14/2911: {Arsenides}
- H10P 14/2925: {Surface structures}
- H10P 14/2926: {Crystal orientations}
- H10P 14/3216: {Nitrides}
- H10P 14/3242: {Structure}
- H10P 14/3248: {consisting of two layers}
- H10P 14/3254: {Graded layers}
- H10P 14/3416: {Nitrides}
- H10P 14/3421: {Arsenides}
- H10P 14/3422: {Antimonides}
- H10P 14/3451: {Structure}
- H10P 14/3458: {Monocrystalline}
- H10P 14/36: {characterised by treatments done before the formation of the materials}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device is disclosed. The semiconductor device includes a substrate comprising a groove. A buffer layer is formed on a surface of the groove. The buffer layer comprising at least one material chosen from AIN, GaN or AlxGa1-xN, where x is between zero and one. An epitaxially grown semiconductor material is disposed over the buffer layer, at least a portion of the epitaxially grown semiconductor material having a cubic crystalline phase structure. Methods of forming the semiconductor devices are also taught.

## Claims

### Claim 1

A semiconductor device comprising:
a (001) crystalline semiconductor substrate comprising a groove exposing (111) faces of crystalline semiconductor;
a buffer layer formed on a surface of the groove, the buffer layer comprising at least one material chosen from AlN, GaN or AlxGa1-xN, where x is between zero and one; and
an epitaxially grown semiconductor material disposed over the buffer layer, the epitaxially grown semiconductor material having a cubic crystalline phase structure and a hexagonal phase structure, wherein the epitaxially grown semiconductor layer includes at least one quantum well spanning and disposed in both the cubic crystalline phase structure and the hexagonal phase structure.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the groove is a v-groove.

### Claim 3 (depends on 2)

The semiconductor device of claim 2, wherein the width of the v-groove is less than about 10 micrometers.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the substrate comprises (001) single crystal silicon.

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein the buffer layer comprises an AlN nucleation layer and an AlxGa1-xN interlayer deposited on the nucleation layer, where x is defined as in claim 1.

### Claim 6 (depends on 5)

The semiconductor device of claim 5, wherein a concentration of Al and Ga in the interlayer is graded through at least a portion of the thickness of the interlayer.

### Claim 7 (depends on 5)

The semiconductor device of claim 5, wherein a concentration of Al and Ga in the interlayer is substantially constant through the thickness of the interlayer.

### Claim 8 (depends on 5)

The semiconductor device of claim 5, wherein a concentration of Al and Ga varies in a stepwise manner through at least a portion of the thickness of the interlayer.

### Claim 9 (depends on 1)

The semiconductor device of claim 1, wherein the epitaxially grown semiconductor material includes a spatially continuous, phase-separated cubic Ill-nitride material along the length of the groove.

### Claim 10 (depends on 1)

The semiconductor device of claim 1, wherein the epitaxially grown semiconductor material further comprises c-InyGa1-yN, where y is greater than zero and equal to or less than one.

### Claim 11 (depends on 1)

The semiconductor device of claim 1, wherein the epitaxially grown semiconductor material includes at least one quantum well.

### Claim 12 (depends on 1)

The semiconductor device of claim 1, wherein the substrate comprises a plurality of grooves and the epitaxially grown semiconductor material comprises a plurality of separated cubic regions formed in the grooves.

### Claim 13 (depends on 1)

The semiconductor device of claim 1, wherein the epitaxially grown semiconductor material comprises a c-GaN region and a h-GaN region.

### Claim 14 (depends on 1)

The semiconductor device of claim 1, wherein the device is an LED, a transistor, a photodetector or a laser.

### Claim 15 (depends on 1)

The semiconductor device of claim 1, wherein the semiconductor device comprises stripes of the epitaxially grown layer and silicon regions, wherein electronic devices are positioned in both the epitaxially grown layer and the silicon regions.

### Claim 16

A method of forming a semiconductor device, the method comprising:
providing a planar crystalline substrate comprising a groove exposing different crystal faces than the planar surface;
depositing a buffer layer over the substrate, the buffer layer comprising at least one material chosen from AlN, GaN or AlxGa1-xN, where x is between zero and one;
epitaxially growing a semiconductor layer over the buffer layer, the epitaxially grown semiconductor layer having a cubic crystalline phase structure and a hexagonal phase structure, wherein the epitaxially grown semiconductor layer includes at least one quantum well spanning and disposed in both the cubic crystalline phase structure and the hexagonal phase structure.

### Claim 17 (depends on 16)

The method of claim 16, further comprising removing at least a portion of the substrate and bonding the remaining portion comprising the epitaxially grown layer to a second substrate.

### Claim 18 (depends on 16)

The method of claim 16, wherein selective area decomposition of a precursor gas is used to form electrical connections to the cubic crystalline devices.

### Claim 19 (depends on 16)

The method of claim 16, wherein the method comprises completely or partially removing at least one of Si material from the substrate, or h-GaN or h-InGaN quantum wells from the epitaxially grown layer.

### Claim 20

A method of forming a semiconductor device, the method comprising:
providing a planar crystalline substrate comprising a groove exposing different crystal faces than the planar surface;
depositing a buffer layer over the substrate, the buffer layer comprising at least one material chosen from MN, GaN or AlxGa1-xN, where x is between zero and one;
epitaxially growing a semiconductor layer over the buffer layer, the epitaxially grown semiconductor layer having a cubic crystalline phase structure and a hexagonal phase structure, wherein the epitaxially grown semiconductor layer includes at least one quantum well spanning both the cubic crystalline phase structure and the hexagonal phase structure;
providing a handle wafer;
bonding the epitaxially grown semiconductor layer to the handle wafer;
removing the substrate; and
removing the hexagonal phase structure from the cubic crystalline phase structure.