# US 9,520,468 B2 · Integrated power device on a semiconductor substrate having an improved trench gate structure

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- Number: US 9,520,468 B2
- Document ID: US9520468B2
- Status: Granted
- Kind: B2
- Application number: 14/166,075
- Filed: 2014-01-28
- Published: 2014-05-22
- Granted: 2016-12-13
- Earliest claimed: 2008-12-31
- Assignees: STMicroelectronics S.r.l.
- Applicants: STMICROELECTRONICS S.r.l.
- Inventors: Angelo Magri′; Antonino Sebastiano Alessandria; Stefania Fortuna; Leonardo Fragapane
- Web page: https://patentgrep.com/patent/US9520468B2

## CPC

- H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors}
- H10D 12/038: {having a recessed gate, e.g. trench-gate IGBTs}
- H10D 12/481: {having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs}
- H10D 30/0297: {using recessing of the gate electrodes, e.g. to form trench gate electrodes}
- H10D 62/292: {Non-planar channels of IGFETs (resulting from the gate electrode dispositions, e.g. within trenches H10D64/512)}
- H10D 64/115: {Resistive field plates, e.g. semi-insulating field plates}
- H10D 64/117: {Recessed field plates, e.g. trench field plates or buried field plates}
- H10D 64/513: {within recesses in the substrate, e.g. trench gates, groove gates or buried gates}
- H10D 64/661: {the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation (having lateral variation in the gate structure H10D64/671)}
- H10D 64/662: {the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures}
- H10D 64/516: {the thicknesses being non-uniform}
- H10D 64/519: {characterised by their top-view geometrical layouts}
- H10D 64/663: {the additional layers comprising a silicide layer contacting the layer of silicon, e.g. polycide gates}
- H10D 64/664: {the additional layers comprising a barrier layer between the layer of silicon and an upper metal or metal silicide layer}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A power device integrated on a semiconductor substrate and having a plurality of conductive bridges within a trench gate structure. In an embodiment, a semiconductor substrate includes a trench having sidewalls and a bottom, the walls and bottom are covered with a first insulating coating layer which then also includes a conductive gate structure. An embodiment provides the formation of the conductive gate structure with covering at least the sidewalls with a second conductive coating layer of a first conductive material. This results in a conductive central region of a second conductive material having a different resistivity than the first conductive material forming a plurality of conductive bridges between said second conductive coating layer and said conductive central region.

## Claims

### Claim 1

A power device comprising:
a semiconductor substrate having at least one trench therein defining sidewalls and a bottom;
a first insulating material coating layer extending along said sidewalls and said bottom of said at least one trench;
a conductive gate structure in said at least one trench;
wherein said conductive gate structure comprises a second conductive coating layer comprising a first conductive material extending along said sidewalls of said at least one trench, and a conductive central region comprising a second conductive material being interconnected to said second conductive coating layer, the second conductive material having a different resistivity than said first conductive material; and
a plurality of contact areas along said sidewalls of said at least one trench and between said second conductive coating layer and said conductive central region, respective insulating elements separating adjacent ones of said plurality of contact areas, and said plurality of contact areas being filled in with said second conductive material.

### Claim 2 (depends on 1)

The power device of claim 1, wherein each contact area of said plurality of contact areas has a different width than the width of each of said insulating elements.

### Claim 3 (depends on 2)

The power device of claim 2, further comprising, in correspondence with said bottom of said at least one trench over said semiconductor substrate, at the side of said at least one trench, a lower portion and upper portion of an oxide layer respectively.

### Claim 4 (depends on 3)

The power device of claim 3, further comprising onboard circuitry including an intermediate dielectric layer arranged over said semiconductor substrate and source terminals and gate terminals and corresponding source-body contacts and gate contacts.

### Claim 5 (depends on 4)

The power device of claim 4, further comprising at least a conductive buried strip positioned crosswise to said at least one trench and included in said upper portions of said oxide layer.

### Claim 6 (depends on 4)

The power device of claim 4, further comprising a conductive connection layer having a first portion overlapping to said upper portions of said oxide layer and in contact with said conductive central region of said at least one trench and a second portion overlapping to said onboard circuitry.

### Claim 7 (depends on 6)

The power device of claim 6, further comprising said gate terminals being positioned on said conductive connection layer and in that said gate contacts contact said conductive connection layer.

### Claim 8 (depends on 4)

The power device of claim 4, wherein said at least one trench comprises an end portion near said onboard circuitry suitable to include a gate contact, said end portion having a greater surface width than a surface width of a remaining portion of said at least one trench.

### Claim 9 (depends on 8)

The power device of claim 8, further comprising a single end portion for two or more consecutive trenches in order to define a single common part for a single gate contact for such two or more of said trenches.

### Claim 10

A semiconductor structure, comprising:
a semiconductor material having a trench therein defining a trench bottom and a trench sidewall;
a first insulator disposed over the trench bottom and the trench sidewall;
a first conductor disposed over the first insulator;
a second insulator disposed within the trench over the first conductor and having at least one opening therein along the trench sidewall;
a second conductor disposed over the second insulator and extending along the trench sidewall; and
a plurality of contact areas spaced apart along a same planar side of the trench sidewall between the first conductor and the second conductor and respective insulating elements separating adjacent ones of the plurality of contact areas on the same planar side of the trench sidewall, the plurality of contact areas interconnecting the first conductor and the second conductor through the at least one opening along the trench sidewall.

### Claim 11 (depends on 10)

The semiconductor structure of claim 10, wherein a region of the semiconductor material comprises:
a substrate; and
an epitaxial layer disposed over the substrate such that the trench extends through the epitaxial layer and into the substrate.

### Claim 12 (depends on 10)

The semiconductor structure of claim 10, wherein the second insulator comprises multiple openings; and the first conductor contacts the second conductor through the multiple openings.

### Claim 13 (depends on 10)

The semiconductor structure of claim 10, wherein:
the first conductor has a first resistivity; and
the second conductor has a second resistivity that is different from the first resistivity.

### Claim 14 (depends on 10)

The semiconductor structure of claim 10, further comprising:
wherein a region of the semiconductor material includes a first surface through which the trench extends and a second surface that is opposite to the first surface;
a source disposed adjacent to the trench sidewall and to the first surface;
a body disposed adjacent to the trench sidewall and beneath the source; and
a drain disposed adjacent to the trench sidewall and beneath the body.

### Claim 15 (depends on 14)

The semiconductor structure of claim 14, further comprising circuitry disposed within the region of semiconductor material remote from the source, body and drain.

### Claim 16 (depends on 14)

The semiconductor structure of claim 14, wherein the source, body and drain comprises a MOS transistor.

### Claim 17 (depends on 16)

The semiconductor structure of claim 16, further comprising a control circuit disposed within the region of semiconductor material configured to control the MOS transistor.

### Claim 18 (depends on 16)

The semiconductor structure of claim 16 wherein the source, body and drain comprises an insulated-gate bipolar transistor.