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US 9,520,466 B2Granted
Vertical gate-all-around field effect transistors and methods of forming same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMartin Christopher Holland, Blandine Duriez, Mark van Dal
Life of this patent
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Abstract
Semiconductor devices and methods of forming the same are provided. A template layer is formed on a substrate, the template layer having a recess therein. A plurality of nanowires is formed in the recess. A gate stack is formed over the substrate, the gate stack surrounding the plurality of nanowires.
Claims20
A method of forming a semiconductor device, the method comprising:
- forming a template layer on a substrate, the template layer having a first recess therein;
- forming a plurality of first nanowires in the first recess;
- and
- forming a first gate stack, the first gate stack surrounding the plurality of first nanowires.
1 more element
A method of forming a semiconductor device, the method comprising:
- forming a template layer on a substrate;
- patterning the template layer to form a first recess and a second recess in the template layer, a width of the first recess being different from the a width of the second recess;
- epitaxially growing a plurality of first nanowires in the first recess and a plurality of second nanowires in the second recess;
- forming a first gate stack, the first gate stack surrounding the plurality of first nanowires;
- and
- forming a second gate stack, the second gate stack surrounding the plurality of second nanowires.
3 more elements
A method of forming a semiconductor device, the method comprising:
- doping a substrate to form a first source/drain region in the substrate;
- forming a template layer over the first source/drain region;
- etching the template layer to form a first opening in the template layer, the first opening exposing the first source/drain region;
- epitaxially growing a plurality of nanowires in the first opening;
- depositing a gate dielectric layer over the substrate, the gate dielectric layer surrounding the plurality of nanowires;
- and
- depositing a gate electrode layer over the substrate, the gate electrode layer surrounding the gate dielectric layer.
4 more elements
Dependencies are inferred from the claim text.