# US 9,520,464 B2 · Configuration and method to generate saddle junction electric field in edge termination

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- Number: US 9,520,464 B2
- Document ID: US9520464B2
- Status: Granted
- Kind: B2
- Application number: 14/987,344
- Filed: 2016-01-04
- Published: 2016-09-29
- Granted: 2016-12-13
- Earliest claimed: 2011-03-29
- Assignees: Alpha and Omega Semiconductor Incorporated
- Applicants: Alpha and Omega Semiconductor Incorporated
- Inventors: Madhur Bobde; Lingpeng Guan; Anup Bhalla; Hamza Yilmaz
- Web page: https://patentgrep.com/patent/US9520464B2

## CPC

- H10D 62/111: {Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures}
- H10D 8/00: Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00)
- H10D 8/01: Manufacture or treatment
- H10D 62/058: {by using trenches, e.g. implanting into sidewalls of trenches or refilling trenches}
- H10D 62/105: {by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] (IGFETs having LDD or drain extension regions H10D30/601)}
- H10D 62/106: {having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions}
- H10P 30/204: {into Group IV semiconductors}
- H10P 30/21: {of electrically active species}
- H10W 10/031: {of isolation regions comprising PN junctions}
- H10W 10/30: Isolation regions comprising PN junctions
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

This invention discloses a semiconductor power device disposed in a semiconductor substrate and having an active cell area and an edge termination area the edge termination area wherein the edge termination area comprises a superjunction structure having doped semiconductor columns of alternating conductivity types with a charge imbalance between the doped semiconductor columns to generate a saddle junction electric field in the edge termination.

## Claims

### Claim 1

A method for manufacturing a power device in a semiconductor substrate with an active cell area and an edge termination area comprising:
forming doped semiconductor columns of alternating conductivity types in the edge termination area by opening a plurality of trenches with slightly slanted sidewalls in an N-type epitaxial layer supported on said semiconductor substrate and opening the trenches with a predefined gap between the trenches followed by implanting ions of alternating conductivities through the sidewalls then filled the trenches with an intrinsically doped material for creating the net P type doping in the termination region.

### Claim 2 (depends on 1)

The method of claim 1 wherein:
the step of forming said doped semiconductor columns further comprises a step of forming P-columns and N-columns by forming the P-columns with a greater electric charges than the N-columns.

### Claim 3 (depends on 1)

The method of claim 1 wherein:
the step of forming said doped semiconductor columns further comprises a step of forming P-columns and N-columns by forming the P-columns with a greater width than the N-columns.

### Claim 4 (depends on 1)

The method of claim 1 wherein:
the step of forming said doped semiconductor columns further comprises a step of forming P-columns and N-columns by forming the P-columns with a greater dopant concentration than the N-columns.

### Claim 5 (depends on 1)

The method of claim 1 wherein:
the step of forming said doped semiconductor columns further comprises a step of forming P-columns and N-columns by forming the P-columns with a higher dopant concentration on a top portion than a bottom portion of the P-columns dopant concentration than the N-columns.

### Claim 6 (depends on 1)

The method of claim 1 wherein:
the step of forming said doped semiconductor columns further comprises a step of forming P-columns and N-columns by opening a plurality of trenches with slightly slanted sidewalls in an N-type epitaxial layer supported on said semiconductor substrate and opening the trenches with a predefined gap between the trenches followed by implanting ions of alternating conductivities through the sidewalls then filled the trenches with an intrinsically doped material for creating the net P type doping in the termination region.

### Claim 7 (depends on 1)

The method of claim 1 wherein:
the step of forming said doped semiconductor columns further comprises a step of forming P-columns and N-columns by opening a plurality of trenches with slightly slanted sidewalls in an N-type epitaxial layer supported on said semiconductor substrate followed by filling the trenches with an intrinsically P-doped material for creating the net P type doping in the termination region.