# US 9,520,401 B2 · Semiconductor devices capable of self-curing

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- Number: US 9,520,401 B2
- Document ID: US9520401B2
- Status: Granted
- Kind: B2
- Application number: 14/197,588
- Filed: 2014-03-05
- Published: 2014-11-27
- Granted: 2016-12-13
- Earliest claimed: 2013-05-23
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Sungsam Lee
- Web page: https://patentgrep.com/patent/US9520401B2

## CPC

- H10B 12/315: {with the capacitor higher than a bit line}
- H10B 12/34: {the transistor being at least partially in a trench in the substrate}
- H10B 12/482: {Bit lines}
- H10B 12/488: {Word lines}
- H10D 89/10: Integrated device layouts
- H10B: ELECTRONIC MEMORY DEVICES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor device includes a plurality of first signal lines crossing a plurality of second signal lines. At least one of the first signal lines has a first end to receive a first voltage and a second end to receive a second voltage. The first and second voltages are applied simultaneously to respective ones of the first and second ends. A difference between the first and second voltages causes joule heating in the at least one first signal line. The joule heating may correct one or more defects in the semiconductor device.

## Claims

### Claim 1

A semiconductor device, comprising:
a plurality of word lines; and
a plurality of bit lines which cross the word lines,
wherein at least one of the word lines includes a first end to which a positive voltage is applied and a second end to which a negative voltage is applied, and wherein the positive and negative voltages are to be applied simultaneously to respective ones of the first and second ends.

### Claim 2 (depends on 1)

The device as claimed in claim 1, further comprising:
a first wire electrically connected to the first end; and
a second wire electrically connected to the second end,
wherein the positive voltage is applied to the first end through the first wire, and
wherein the negative voltage is applied to the second end through the second wire.

### Claim 3 (depends on 1)

The device as claimed in claim 1, wherein the at least one word line comprises a dummy or isolation word line.

### Claim 4 (depends on 1)

The device as claimed in claim 1, further comprising:
a substrate having active regions, each of the active regions having an island shape extending in a third direction which crosses a first direction in which the word lines extend and a second direction in which the bit lines extend.

### Claim 5 (depends on 4)

The device as claimed in claim 4, wherein the active regions are arranged in a zigzag pattern in the first direction and partially overlap each other in the first direction.

### Claim 6 (depends on 4)

The device as claimed in claim 4, wherein the active regions are arranged in a row in the first direction and overlap each other in the first direction.

### Claim 7 (depends on 6)

The device as claimed in claim 6, wherein:
the substrate includes a device isolation layer extending in the first direction, and
the at least one word line is buried in the device isolation layer and extends without crossing the active regions.

### Claim 8 (depends on 1)

The device as claimed in claim 1, further comprising:
a substrate including active regions, each of the active regions having substantially a line shape extending in a third direction which crosses a first direction in which the word lines extend and a second direction in which the bit lines extend.

### Claim 9 (depends on 1)

The device as claimed in claim 1, further comprising:
a substrate including active regions defined by an isolation layer,
wherein the word lines are buried in the device isolation layer and extend in a first direction, and wherein the bit lines are disposed on the substrate and extend in a second direction crossing the first direction.

### Claim 10 (depends on 1)

The device as claimed in claim 1, further comprising:
capacitors electrically connected to a substrate;
node contacts electrically connecting the capacitors to the substrate; and
bit line contacts electrically connecting the bit lines to the substrate.

### Claim 11

A semiconductor device, comprising:
a semiconductor substrate including active regions defined by a device isolation layer;
word lines extending to cross the active regions in a first direction; and
bit lines extending to cross the active regions in a second direction different from the first direction and crossing the word lines, wherein at least one of the word lines is self-heated when voltages are applied simultaneously to respective ends of the at least one word line, the voltages having polarities different from each other.

### Claim 12 (depends on 11)

The device as claimed in claim 11, wherein:
the active regions extend in a third direction crossing the first and second directions and have island shapes arranged in a zigzag pattern in the first direction,
the bit lines extend to cross central portions of the active regions, and
the word lines extend to cross edges of the active regions.

### Claim 13 (depends on 11)

The device as claimed in claim 11, wherein:
the active regions extend in a third direction crossing the first and second directions and have island shapes arranged in a row in the first direction,
the bit lines extend to cross central portions of the active regions, and
the at least one word line is buried in the device isolation layer between adjacent ones of the active regions in the second direction and extend without crossing the active regions, and other word lines extend to cross edges of the active regions.

### Claim 14 (depends on 11)

The device as claimed in claim 11, wherein:
the active regions have a line shape extending in a third direction crossing the first and second directions,
the word lines and the bit lines extend to cross the active regions, and
at least one word line electrically isolates adjacent word lines from each other, wherein the at least word line is located between the adjacent word lines.

### Claim 15 (depends on 11)

The device as claimed in claim 11, wherein:
the semiconductor substrate comprises a cell block,
the at least one word line is disposed outside the cell block,
other word lines and the bit lines are disposed within the cell block.

### Claim 16

A semiconductor device, comprising:
a plurality of first signal lines; and
a plurality of second signal lines crossing the first signal lines,
wherein at least one of the first signal lines has a first end to receive a first voltage and a second end to receive a second voltage, wherein the first and second voltages are applied simultaneously to respective ones of the first and second ends, and wherein a difference between the first and second voltages causes joule heating in the at least one first signal line.

### Claim 17 (depends on 16)

The device as claimed in claim 16, wherein the difference between the first and second voltages reduces electrical or thermal stress in an area including or adjacent to the at least one first signal line.

### Claim 18 (depends on 16)

The device as claimed in claim 16, wherein the first signal lines are word lines and the second signal lines are bit lines.

### Claim 19 (depends on 16)

The device as claimed in claim 16, wherein the first signal lines are dummy signal lines.

### Claim 20 (depends on 16)

The device as claimed in claim 16, wherein the semiconductor device is a memory.