# US 9,520,378 B2 · Thermal matched composite die

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- Number: US 9,520,378 B2
- Document ID: US9520378B2
- Status: Granted
- Kind: B2
- Application number: 13/725,356
- Filed: 2012-12-21
- Published: 2014-06-26
- Granted: 2016-12-13
- Earliest claimed: 2012-12-21
- Assignees: Intel Corporation
- Applicants: Aleksandar Aleksov; Shawna M. Liff
- Inventors: Aleksandar Aleksov; Shawna M. Liff
- Web page: https://patentgrep.com/patent/US9520378B2

## CPC

- H10W 99/00: Subject matter not provided for in other groups of this subclass
- C08G 8/30: by unsaturated compounds, e.g. terpenes
- C09J 5/00: Adhesive processes in general; Adhesive processes not provided for elsewhere, e.g. relating to primers
- C09J 161/14: Modified phenol-aldehyde condensates
- C09J 163/00: Adhesives based on epoxy resins; Adhesives based on derivatives of epoxy resins
- G06F 1/20: Cooling means
- H10W 40/226: {characterised by projecting parts, e.g. fins to increase surface area (leadframes for cooling H10W70/461)}
- H10W 40/251: {Organics}
- H10W 40/77: Auxiliary members characterised by their shape
- H10W 72/00: Interconnections or connectors in packages
- H10W 76/10: Containers or parts thereof
- C08G 2261/3424: non-conjugated, e.g. paracyclophanes or xylenes
- C09J 165/00: Adhesives based on macromolecular compounds obtained by reactions forming a carbon-to-carbon link in the main chain (C09J107/00 - C09J157/00, C09J161/00 take precedence); Adhesives based on derivatives of such polymers
- C09J 2203/326: for bonding electronic components such as wafers, chips or semiconductors
- C09J 2400/163: in the substrate
- G06F 2200/201: Cooling arrangements using cooling fluid
- H10W 72/01323: {in liquid form, e.g. by dispensing droplets or by screen printing}
- H10W 72/01333: {in liquid form, e.g. spin coating, spray coating or immersion coating}
- H10W 72/01365: {Thermally treating (reflowing H10W72/01357)}
- H10W 72/01951: {Changing the shapes of bond pads}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07331: {Connecting techniques}
- H10W 72/07332: {Compression bonding, e.g. thermocompression bonding}
- H10W 72/07338: {hardening the adhesive by curing, e.g. thermosetting}
- H10W 72/07355: {changes in materials}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/325: {Die-attach connectors having a filler embedded in a matrix}
- H10W 72/351: {Materials of die-attach connectors}
- H10W 72/353: {not comprising solid metals or solid metalloids, e.g. ceramics}
- H10W 72/354: {comprising polymers}
- H10W 72/59: Bond pads specially adapted therefor
- H10W 72/877: {Bump connectors and die-attach connectors}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/953: {not comprising solid metals or solid metalloids, e.g. polymers, ceramics or liquids}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- C08G: MACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
- C09J: ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES (preparation of glue or gelatine C09H)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A thermal matched composite material, suitable for use as a die is described. In one example, the material includes a metal plate and a substrate having a coefficient of thermal expansion (CTE) lower than the metal plate to carry microelectronic circuits. An adhesive layer between the substrate and the metal plate physically attaches the metal plate to the substrate so that the combined metal plate and substrate have a higher CTE than the substrate alone.

## Claims

### Claim 1

An apparatus comprising:
a metal plate;
a semiconductor die configured to carry microelectronic circuits and connectors formed on a back end of substrate, the substrate having a linear coefficient of thermal expansion (CTE) lower than the metal plate; and
an adhesive layer on the front end of the substrate opposite the back end between the substrate and the metal plate to physically attach and mechanically couple the metal plate to the substrate so that the combined metal plate and substrate form a composite that has a higher CTE than the substrate alone, the adhesive layer having a first sub-layer proximate the substrate and a second sub-layer proximate the metal, the first and second sub-layers being gradated structures.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein the substrate is formed of at least one of silicon, glass, germanium, III-IV, silicon-on-insulator, and ceramic.

### Claim 3 (depends on 1)

The apparatus of claim 1, where in the substrate is configured to carry solder and wherein the adhesive layer is bonded to metal and the substrate at a temperature lower than the melting temperature of the solder.

### Claim 4 (depends on 1)

The apparatus of claim 1, wherein the first sub-layer of the adhesive layer includes a silicon preferential portion to bond to the substrate and the second sub-layer of the adhesive layer has a metal preferential portion to bond to the metal, the two portions being bonded to each other.

### Claim 5 (depends on 4)

The apparatus of claim 4, wherein the silicon preferential portion is applied to the substrate and the metal preferential portion is applied to the metal plate and where in the two portions are pressed together to bond the silicon substrate to the metal plate.

### Claim 6 (depends on 5)

The apparatus of claim 5, wherein the first sub-layer comprises epoxy.

### Claim 7 (depends on 6)

The apparatus of claim 6, wherein the first sub-layer comprises a zirconium alkoxide with epoxy functionalized silane to form a sol-gel network.

### Claim 8 (depends on 1)

The apparatus of claim 1, wherein the metal plate has a thickness that is twice the thickness of the semiconductor die.

### Claim 9 (depends on 1)

The apparatus of claim 1, wherein the adhesive layer comprises terpene phenols proximate the metal plate, zirconia proximate the silicon substrate, and epoxy between the terpene phenols and the zirconia.

### Claim 10 (depends on 4)

The apparatus of claim 4, wherein the adhesive layer comprises gradations of terpene phenols proximate and adhered to the metal plate, amines proximate and adhered to the terpene phenols, epoxy proximate and adhered to the amines, and zirconia proximate and adhered to the silicon substrate.

### Claim 11 (depends on 1)

The apparatus of claim 1, wherein the metal plate comprises copper, the apparatus further comprising a copper diffusion barrier between the metal plate and the adhesive layer.

### Claim 12

An apparatus comprising:
a communications chip;
a mass memory; and
a processor formed on a packaged die, the packaged die having a metal plate, a semiconductor die configured to carry microelectronic circuits and connectors formed on a back end of a substrate having a linear coefficient of thermal expansion (CTE) lower than the metal plate, and an adhesive layer on the front end of the substrate opposite the back end between the substrate and the metal plate to physically attach and mechanically couple the metal plate to the substrate so that the combined metal plate and substrate form a composite that has a higher CTE than the substrate alone, the adhesive layer having a first sub-layer proximate the substrate with a higher amount of zirconia than a second sub-layer proximate the metal that has more epoxy than the first sub-layer, the first and second sub-layers being gradated structures.

### Claim 13 (depends on 12)

The method of claim 12, wherein applying the first adhesive layer comprises depositing a metal preferential adhesive layer on the metal plate.

### Claim 14 (depends on 12)

The method of claim 12, wherein applying the second adhesive layer comprises spin coating a silicon preferential adhesive on the substrate.

### Claim 15 (depends on 12)

The method of claim 12, wherein pressing comprises pressure bonding.

### Claim 16 (depends on 12)

The method of claim 12, further comprising applying a metal diffusion barrier to the metal plate before applying the first adhesive layer.

### Claim 17 (depends on 12)

The method of claim 12, further comprising surface treating the metal plate before applying the second adhesive layer.

### Claim 18

An apparatus comprising:
a communications chip;
a mass memory; and
a processor formed on a packaged die, the packaged die having a metal plate, a semiconductor die comprising microelectronic circuits and connectors formed on a back end of a substrate, the substrate having a linear coefficient of thermal expansion (CTE) lower than the metal plate, and an adhesive layer on the front end of the substrate opposite the back end between the substrate and the metal plate to physically attach and mechanically couple the metal plate to the substrate so that the combined metal plate and substrate form a composite that has a higher CTE than the substrate alone, the adhesive layer having a first sub-layer proximate the substrate with a higher layer of zirconia than a second sub-layer proximate the metal that has more epoxy than the first sub-layer, the first and second sub-layers being gradated structures.

### Claim 19 (depends on 18)

The apparatus of claim 18, the packaged die further comprising a cooler directly attached to the metal plate.

### Claim 20 (depends on 18)

The apparatus of claim 18, wherein substrate comprises silicon with semiconductors and metal layers formed thereon.
