# US 9,520,375 B2 · Method of forming a solder bump on a substrate

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- Number: US 9,520,375 B2
- Document ID: US9520375B2
- Status: Granted
- Kind: B2
- Application number: 14/700,420
- Filed: 2015-04-30
- Published: 2016-11-03
- Granted: 2016-12-13
- Earliest claimed: 2015-04-30
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Toyohiro Aoki; Hiroyuki Mori; Yasumitsu K. Orii; Kazushige Toriyama; Shintaro Yamamichi
- Web page: https://patentgrep.com/patent/US9520375B2

## CPC

- H10W 72/012: {of bump connectors, dummy bumps or thermal bumps}
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 72/01215: {forming coatings}
- H10W 72/01223: {in liquid form, e.g. by dispensing droplets or by screen printing}
- H10W 72/01235: {by plating, e.g. electroless plating or electroplating}
- H10W 72/01238: {in gaseous form, e.g. by CVD or PVD}
- H10W 72/01255: {by using masks}
- H10W 72/01257: {by reflowing}
- H10W 72/01271: {Cleaning, e.g. oxide removal or de-smearing}
- H10W 72/019: {of bond pads}
- H10W 72/01938: {in gaseous form, e.g. by CVD or PVD}
- H10W 72/01953: {by etching}
- H10W 72/072: {of bump connectors}
- H10W 72/222: {Multilayered bumps, e.g. a coating on top and side surfaces of a bump core}
- H10W 72/245: {of outermost layers of multilayered bumps, e.g. bump coating being only on a part of a bump core}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/255: {of outermost layers of multilayered bumps, e.g. material of a coating}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/90: Bond pads, in general
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method of forming a solder bump on a substrate includes: forming a conductive layer(s) on the substrate having a surface on which an electrode pad is prepared; forming a resist layer on the conductive layer(s) having an opening over the electrode pad; forming a metal pillar in the opening of the resist layer, wherein the metal pillar includes a first conductive material; forming a space between sidewalls of the resist layer and the metal pillar; forming a metal barrier layer in the space and on a top surface of the metal pillar, the metal barrier layer including a second conductive material that is different from the first conductive material of the metal pillar; forming a solder layer on the metal barrier layer over the top surface of the metal pillar; removing the resist layer; removing the conductive layer(s); and forming the solder bump by reflowing the solder layer.

## Claims

### Claim 1

A method of forming a solder bump on a substrate, comprising the steps of:
forming at least one conductive layer on the substrate, wherein the substrate has a surface on which an electrode pad is prepared;
forming a resist layer on the at least one conductive layer, the resist layer having an opening over the electrode pad;
forming a metal pillar in the opening of the resist layer, wherein the metal pillar comprises a first conductive material;
forming a space between a sidewall of the resist layer and a sidewall of the metal pillar, wherein the step of forming the space between the sidewall of the resist layer and the sidewall of the metal pillar includes exposing the resist layer using light to shrink the resist layer;
forming a metal barrier layer in the space and on a top surface of the metal pillar, wherein the metal barrier layer comprises a second conductive material which is different from the first conductive material of the metal pillar;
forming a solder layer on the metal barrier layer over the top surface of the metal pillar;
removing the resist layer;
removing the at least one conductive layer; and
forming the solder bump by reflowing the solder layer.

### Claim 2 (depends on 1)

The method according to claim 1, wherein the step of forming the resist layer includes thermally curing a resist material deposited on the substrate.

### Claim 3 (depends on 1)

The method according to claim 1, wherein the step of forming the metal pillar includes electroplating the first conductive material in the opening of the resist layer so as to leave a cavity from a top surface of the resist layer of a predetermined depth in the opening.

### Claim 4 (depends on 1)

The method according to claim 1, wherein the step of forming the metal barrier layer includes electroplating the second conductive material in the opening in which the space has been formed.

### Claim 5 (depends on 1)

The method according to claim 1, wherein the step of forming the solder layer includes electroplating a solder material from a top surface of the metal barrier layer to a top surface of the resist layer in the opening of the resist layer.

### Claim 6 (depends on 1)

The method according to claim 1, wherein the step of forming the metal barrier layer comprises forming a solder material in the opening in which the space has been formed using an Injection Molded Solder (IMS) process.

### Claim 7 (depends on 1)

The method according to claim 1, wherein the first conductive material comprises Cu, and the second conductive material comprises a Ni or Sn based intermetallic compound.

### Claim 8 (depends on 7)

The method according to claim 7, wherein the step of forming the at least one conductive layer includes the steps of:
forming a first conductive layer on the substrate; and
forming a second conductive layer on the first conductive layer.

### Claim 9 (depends on 8)

The method according to claim 8, wherein the first conductive layer comprises Ti or TiW, and the second conductive layer comprises Cu.

### Claim 10 (depends on 8)

The method according to claim 8, wherein the step of removing the at least one conductive layer includes etching the second conductive layer.

### Claim 11 (depends on 10)

The method according to claim 10, further comprising a step of:
etching the first conductive layer after the solder bump has been formed.

### Claim 12

A method of forming a solder bump on a substrate, comprising the steps of:
forming at least one conductive layer on the substrate, wherein the substrate has a surface on which an electrode pad is prepared;
forming a resist layer on the at least one conductive layer, the resist layer having an opening over the electrode pad;
electroplating a first conductive material in the opening of the resist layer to form a metal pillar in the opening of the resist layer;
heating the resist layer to form a space between a sidewall of the resist layer and a sidewall of the metal pillar;
forming a metal barrier layer in the space and on a top surface of the metal pillar, wherein the metal barrier layer comprises a second conductive material which is different from the first conductive material of the metal pillar;
forming a solder layer on the metal barrier layer over the top surface of the metal pillar;
removing the resist layer;
etching the at least one conductive layer; and
reflowing the solder layer to form the solder bump.

### Claim 13 (depends on 12)

The method according to claim 12, wherein the step of forming the resist layer includes thermally curing a resist material deposited on the substrate.

### Claim 14 (depends on 13)

The method according to claim 13, wherein the step of heating the resist layer includes heating the resist layer at a temperature higher than a temperature which thermally cures the resist material.

### Claim 15 (depends on 12)

The method according to claim 12, wherein the step of forming the metal barrier layer includes electroplating the second conductive material in the opening in which the space has been formed.

### Claim 16 (depends on 12)

The method according to claim 12, wherein the step of forming the solder layer includes electroplating solder material from a top surface of the metal barrier layer to a top surface of the resist layer in the opening of the resist layer.

### Claim 17 (depends on 12)

The method according to claim 12, wherein the step of forming the metal barrier layer comprises forming solder material in the opening in which the space has been formed using an Injection Molded Solder (IMS) process.

### Claim 18 (depends on 12)

The method according to claim 12, wherein the first conductive material comprises Cu, and the second conductive material comprises a Ni or Sn based intermetallic compound.