# US 9,520,352 B2 · Wiring board and semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,520,352 B2 - Document ID: US9520352B2 - Status: Granted - Kind: B2 - Application number: 14/962,536 - Filed: 2015-12-08 - Published: 2016-06-16 - Granted: 2016-12-13 - Earliest claimed: 2014-12-10 - Assignees: Shinko Electric Industries Co., Ltd. - Applicants: Shinko Electric Industries Co., Ltd. - Inventors: Hiromu Arisaka; Noriyoshi Shimizu; Toshinori Koyama; Akio Rokugawa - Web page: https://patentgrep.com/patent/US9520352B2 ## CPC - H10W 70/685: comprising multiple insulating layers - H05K 1/11: Printed elements for providing electric connections to or between printed circuits - H05K 1/115: {Via connections; Lands around holes or via connections (H05K1/112 takes precedence)} - H05K 1/181: associated with surface mounted components - H05K 3/3452: Solder masks - H10W 46/00: Marks applied to devices, e.g. for alignment or identification - H10W 70/635: {Through-vias} - H10W 70/69: Insulating materials thereof - H10W 74/131: {the semiconductor body being only partially enclosed} - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H05K 1/0298: {Multilayer circuits} - H05K 2201/0191: wherein the thickness of the dielectric plays an important role - H05K 2201/2081: Compound repelling a metal, e.g. solder - H10W 42/121: {protecting against mechanical damage (H10W76/00, H10W74/00 take precedence)} - H10W 46/101: {characterised by the type of information, e.g. logos or symbols} - H10W 46/301: {for alignment} - H10W 46/607: {Located on parts of packages, e.g. on encapsulations or on package substrates} - H10W 70/655: Fan-out layouts - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ## Abstract A wiring board includes a first wiring layer, a first insulating layer, first via wirings, connection terminals and a protection layer. The first insulating layer is formed with through holes. The first via wirings are formed in the through holes. The connection terminals are electrically connected to the first wiring layer through the first via wirings. The connection terminals protrude upward from the first insulating layer. The protection layer is made of insulating resin which contains photosensitive resin as a main component. The protection layer is formed on an upper surface of the first insulating layer. The protection layer includes first and second protection layers. The first protection layer surrounds the connection terminals. The second protection layer is separated from the first protection layer. The second protection layer is thinner than the first protection layer. ## Claims ### Claim 1 A wiring board comprising: a first wiring layer comprising an upper surface, a lower surface that is opposite from the upper surface, and a side surface that connects the upper surface and the lower surface; a first insulating layer made of first insulating resin which contains first photosensitive resin as a main component, the first insulating layer covering the side surface of the first wiring layer and covering one part of the upper surface of the first wiring layer, the first insulating layer being formed with through holes, the through holes passing through the first insulating layers in a thickness direction, the through holes exposing the remaining part of the first wiring layer; first via wirings formed in the through holes; connection terminals that are electrically connected to the first wiring layer through the first via wirings, that protrude upward from an upper surface of the first insulating layer, and that are to be connected to an electronic component; and a protection layer that is made of second insulating resin which contains second photosensitive resin as a main component and that is formed on the upper surface of the first insulating layer, wherein the protection layer comprises a first protection layer that is formed in a mounting region in which the electronic component is to be mounted, and that surrounds the connection terminals, and a second protection layer that is formed in an outer peripheral region outside the mounting region, that is separated from the first protection layer by a first opening portion which exposes the upper surface of the first insulating layer, and that is thinner than the first protection layer. ### Claim 2 (depends on 1) The wiring board of claim 1, wherein the first protection layer is thinner than the connection terminals. ### Claim 3 (depends on 1) The wiring board of of claim 1, wherein: the first protection layer comprises first protection insulating layers that surround the connection terminals respectively and that is in contact with side surfaces of the connection terminals, and second protection insulating layers that surround the connection terminals, respectively, that are formed between adjacent ones of the first protection insulating layers and that are separated from the first protection insulating layers, second opening portions are formed between the first protection insulating layers and the second protection insulating layers and between the adjacent ones of the first protection insulating layers, the second opening portions expose the upper surface of the first insulating layer, and the second opening portions surround the first protection insulating layers. ### Claim 4 (depends on 3) The wiring board of claim 3, wherein curved portions are formed on upper surfaces of the first protection insulating layers, the curved portions are concave toward a direction away from the connection terminals, and the curved portions extend from the side surfaces of the connection terminals. ### Claim 5 (depends on 3) The wiring board of claim 3, wherein rising portions are formed on upper surfaces of the first protection insulating layers so as to rise upward, the rising portions are curved and recessed from top portions of the rising portions toward the connection terminals, and the rising portions are curved and recessed from the top portions of the rising portions in a direction away from the connection terminals. ### Claim 6 (depends on 1) The wiring board of claim 1, wherein each connection terminal further comprises an upper surface, and the upper and side surfaces of the connection terminals are roughened surfaces. ### Claim 7 (depends on 1) The wiring board of claim 1, wherein each connection terminal further comprises an upper surface, and a surface roughness of the upper and side surfaces of the connection terminals is in a range of 0.2 μm to 1.0 μm. ### Claim 8 (depends on 1) The wiring board of claim 1, further comprising: a first wiring structure comprising a second wiring layer, a second insulating layer that covers the second wiring layer, and second via wirings that pass through the second insulating layer in the thickness direction and that are electrically connected to the second wiring layer, each second via wiring comprising an upper end surface exposed from the second insulating layer; and a second wiring structure that is stacked on an upper surface of the second insulating layer and the upper end surfaces of the second via wirings, wherein the second wiring structure comprises the first wiring layer, the first insulating layer, the first via wirings, the connection terminals, and the protection layer, the first wiring layer is electrically connected to the second via wirings, and a wiring width and a wiring interval of the first wiring layer are smaller than those of the second wiring layer. ### Claim 9 (depends on 1) A semiconductor device comprising: the wiring board of claim 1; and a semiconductor chip that is mounted on the connection terminals in a flip-chip manner.