# US 9,520,345 B2 · Semiconductor module, semiconductor device having semiconductor module, and method of manufacturing semiconductor module

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- Number: US 9,520,345 B2
- Document ID: US9520345B2
- Status: Granted
- Kind: B2
- Application number: 14/956,474
- Filed: 2015-12-02
- Published: 2016-05-05
- Granted: 2016-12-13
- Earliest claimed: 2011-08-10
- Assignees: Denso Corporation
- Applicants: Denso Corporation
- Inventors: Hiroshi Ishino; Tomokazu Watanabe
- Web page: https://patentgrep.com/patent/US9520345B2

## CPC

- H10W 70/481: {for devices being provided for in groups H10D8/00 - H10D48/00}
- H10W 40/47: by flowing liquids, e.g. forced water cooling
- H10W 40/611: {Bolts or screws}
- H10W 40/778: {in encapsulations}
- H10W 70/02: of conductive package substrates serving as an interconnection, e.g. of metal plates (manufacture or treatment of leadframes H10W70/04)
- H10W 70/041: {Connecting or disconnecting interconnections to or from leadframes, e.g. connecting bond wires or bumps}
- H10W 70/442: {of multiple leadframes in a single chip}
- H10W 70/461: {specially adapted for cooling}
- H10W 70/465: {Bumps or wires}
- H10W 74/016: {using moulds}
- H10W 74/129: {forming a chip-scale package [CSP]}
- H10W 90/00: Package configurations
- H10W 90/811: {Multiple chips on leadframes}
- H10W 95/00: Packaging processes not covered by the other groups of this subclass
- H10W 72/381: {Auxiliary members}
- H10W 72/622: {Multilayered strap connectors, e.g. having a coating on a lowermost surface of a core}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 72/926: {Multiple bond pads having different sizes}
- H10W 72/944: {Dispositions of multiple bond pads}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/763: {between laterally-adjacent chips}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor module is configured such that heat radiation substrates are connected to lead frames and semiconductor chips are directly connected to the lead frames, so that the semiconductor chips are not connected to the lead frames through conductive portions of the heat radiation substrates. Therefore, the conductive portions can have a solid shape without being divided. As such, an occurrence of curving of the heat radiation substrates is suppressed when a temperature is reduced from a high temperature to a room temperature after resin-sealing at the high temperature or the like. Therefore, connection between the semiconductor chip and the lead frames and connection between the lead frames and the heat radiation substrates enhance.

## Claims

### Claim 1

A semiconductor module comprising:
a semiconductor chip having a front surface and a rear surface, the semiconductor chip being provided with a vertical-type semiconductor power element, the semiconductor chip having a signal line electrode and a front surface electrode on the front surface, and a rear surface electrode on the rear surface;
a first lead frame being connected to the rear surface electrode of the semiconductor chip, and including a first terminal;
a second lead frame including a signal line terminal connected to the signal line electrode of the semiconductor chip, and a plate portion that is connected to the front surface electrode of the semiconductor chip, and from which a second terminal extends;
a first heat radiation substrate being joined to a surface of the first lead frame opposite to a surface on which the semiconductor chip is disposed;
a second heat radiation substrate being joined to a surface of the second lead frame opposite to a surface on which the semiconductor chip is disposed; and
a resin part, wherein the semiconductor chip, the first lead frame the second lead frame, the first heat radiation substrate and the second heat radiation substrate are sealed by the resin part such that the first terminal and the second terminal are exposed from the resin part and a surface of the first heat radiation substrate opposite to a surface joined to the first lead frame and a surface of the second heat radiation substrate opposite to a surface joined to the second lead frame are exposed from the resin part, wherein
each of the first heat radiation substrate and the second heat radiation substrate includes a first conductive portion, a second conductive portion and an insulated substrate, the first conductive portion providing the surface joined to corresponding one of the first lead frame and the second lead frame, the second conductive portion providing the surface exposed from the resin part, the insulated substrate being disposed between the first conductive portion and the second conductive portion,
each of the first conductive portion and the second conductive portion has a solid shape without being divided,
the first conductive portion and the second conductive portion have a symmetric shape,
the first lead frame and the first heat radiation substrate are disposed on one side of the semiconductor chip to provide a component structure,
the second lead frame and the second heat radiation substrate are disposed on the other side of the semiconductor chip to provide a component structure,
the component structure of the one side of the semiconductor chip and the component structure of the other side of the semiconductor chip are symmetric with respect to the semiconductor chip, and
the signal line terminal and the signal line electrode are joined to each other through a joining material having a bump.

### Claim 2 (depends on 1)

The semiconductor module according to claim 1, wherein
an end of the signal line terminal adjacent to the plate portion has a thickness smaller than that of the plate portion.

### Claim 3 (depends on 1)

The semiconductor module according to claim 1,
wherein
the signal line terminal is formed with a through hole at a position joined through the joining material the through hole passing from a front surface to a rear surface of the signal line terminal, and
the joining material is entered in the through hole.

### Claim 4 (depends on 3)

The semiconductor module according to claim 3, wherein
a diameter of the through hole is minimum at a middle position with respect to a depth direction of the through hole and gradually increases toward the front surface and the rear surface of the signal line terminal.