# US 9,520,332 B2 · Wafer level package solder barrier used as vacuum getter

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- Number: US 9,520,332 B2
- Document ID: US9520332B2
- Status: Granted
- Kind: B2
- Application number: 14/736,042
- Filed: 2015-06-10
- Published: 2015-10-01
- Granted: 2016-12-13
- Earliest claimed: 2013-07-11
- Assignees: Raytheon Company
- Applicants: Raytheon Company
- Inventors: Roland W. Gooch; Buu Q. Diep; Adam M. Kennedy; Stephen H. Black; Thomas A. Kocian
- Web page: https://patentgrep.com/patent/US9520332B2

## CPC

- H10W 76/60: Seals
- B81B 7/0038: {using materials for controlling the level of pressure, contaminants or moisture inside of the package, e.g. getters}
- B81C 1/00269: {Bonding of solid lids or wafers to the substrate}
- H10F 39/011: {Manufacture or treatment of image sensors covered by group H10F39/12}
- H10F 39/018: {of hybrid image sensors}
- H10F 39/804: {Containers or encapsulations}
- H10F 39/809: {of hybrid image sensors}
- H10F 39/811: {Interconnections}
- H10W 20/032: {of conductive barrier, adhesion or liner layers}
- H10W 70/66: Conductive materials thereof
- H10W 72/071: {Connecting or disconnecting}
- H10W 76/48: Fillings including materials for absorbing or reacting with moisture or other undesired substances
- B81B 2201/0207: Bolometers
- B81C 2203/035: Soldering
- H10W 72/07251: {characterised by changes in properties of the bump connectors during connecting}
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- B81B: MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES (piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/00, H10N35/00)
- B81C: PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS (making microcapsules or microballoons B01J13/02; processes or apparatus specially adapted for the manufacture or treatment of piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/01)
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION

## Abstract

An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.

## Claims

### Claim 1

A method of fabricating an electronic device comprising:
providing a first substrate having at least one cavity and a surface surrounding the at least one cavity;
depositing a solder barrier layer of titanium material on the surface of the first substrate;
forming a first seal structure on a portion of the surface of the first substrate to form a ring around a perimeter of the at least one cavity, wherein the solder barrier layer of titanium material forms a perimeter around the first seal structure such that the solder barrier layer of titanium material does not extend into the first seal structure, the perimeter defining the portion of the surface of the first substrate that the first seal structure is disposed on;
activating the solder barrier layer of titanium material in a vacuum environment to function as a getter by heating the solder barrier layer of titanium material to a temperature in a range of about 200° C. to about 500° C. for a time period in a range of about 10 minutes to about 120 minutes;
providing a second substrate, the second substrate comprising at least one device attached thereto and a second seal structure, the second seal structure forming a ring around a perimeter of the at least one device;
aligning the first seal structure to the second seal structure, such that the at least one cavity of the first substrate is positioned over the at least one device; and
bonding the first substrate to the second substrate using solder, wherein the solder barrier layer prevents the solder from contacting the first substrate during the bonding.

### Claim 2 (depends on 1)

The method of claim 1, wherein depositing the solder barrier layer of titanium material includes depositing the solder barrier layer with a thickness of the titanium material being in a range of about 1000 Angstroms to about 10,000 Angstroms.

### Claim 3 (depends on 1)

The method of claim 1, wherein activating the at least one solder barrier layer of titanium material is performed after aligning the first seal structure to the second seal structure.

### Claim 4 (depends on 1)

The method of claim 1, wherein activating the solder barrier layer of titanium material is performed simultaneously with bonding the first substrate to the second substrate.
