# US 9,520,325 B2 · Methods for producing semiconductor devices

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 9,520,325 B2
- Document ID: US9520325B2
- Status: Granted
- Kind: B2
- Application number: 13/947,135
- Filed: 2013-07-22
- Published: 2015-01-22
- Granted: 2016-12-13
- Earliest claimed: 2013-07-22
- Assignees: Infineon Technologies Austria AG
- Applicants: Infineon Technologies Austria AG
- Inventors: Andreas Voerckel
- Web page: https://patentgrep.com/patent/US9520325B2

## CPC

- H01L 21/82
- H01L 21/56
- H01L 21/76838
- H01L 23/32
- H01L 24/83
- H01L 21/568
- H01L 2224/32245
- H01L 2224/83005
- H01L 2924/12042
- H01L 2924/1301
- H01L 2924/1305
- H01L 2924/13055
- H01L 2924/181
- H01L 2924/00
- H01L

## Abstract

A method for producing a semiconductor device in accordance with various embodiments may include providing a semiconductor workpiece attached to a first carrier; dicing the semiconductor workpiece and the carrier so as to form at least one individual semiconductor chip; mounting the at least one semiconductor chip with a side facing away from the carrier, to an additional carrier.

## Claims

### Claim 1

A method for producing a power semiconductor device, the method comprising:
providing a semiconductor workpiece attached to a carrier, the semiconductor workpiece comprising a semiconductor wafer including one or more kerf regions;
dicing the semiconductor workpiece and the attached carrier so as to form at least one individual power semiconductor chip, wherein the semiconductor wafer is diced at the one or more kerf regions and the semiconductor workpiece comprises at least silicon carbide;
mounting the at least one power semiconductor chip with a side facing away from the carrier, to an additional carrier; and
removing the carrier from the mounted at least one power semiconductor chip.

### Claim 2 (depends on 1)

The method of claim 1, wherein the semiconductor workpiece comprises a semiconductor layer and a device layer.

### Claim 3 (depends on 2)

The method of claim 2, wherein the semiconductor layer has a thickness of less than or equal to about 100 μm.

### Claim 4 (depends on 2)

The method of claim 2, wherein the device layer is an epitaxial layer.

### Claim 5 (depends on 4)

The method of claim 4, wherein the device layer comprises at least one of silicon carbide and gallium nitride.

### Claim 6 (depends on 2)

The method of claim 2, wherein the semiconductor layer is formed through a SMART cut process.

### Claim 7 (depends on 1)

The method of claim 1, wherein the carrier is substantially transparent.

### Claim 8 (depends on 1)

The method of claim 1, wherein the semiconductor workpiece has a thickness of less than or equal to about 100 μm.

### Claim 9 (depends on 1)

The method of claim 1, wherein the additional carrier is an electrically conductive carrier.

### Claim 10

A method for producing a power semiconductor device, the method comprising:
providing a semiconductor workpiece attached to a carrier, the semiconductor workpiece comprising a semiconductor wafer including one or more kerf regions, wherein the carrier includes glass, graphite, plastic, or metal;
dicing the semiconductor workpiece and the attached carrier so as to form at least one individual power semiconductor chip, wherein the semiconductor wafer is diced at the one or more kerf regions and the semiconductor workpiece comprises at least silicon carbide; and
mounting the at least one power semiconductor chip with a side facing away from the carrier, to an additional carrier.

### Claim 11 (depends on 10)

The method of claim 10, wherein the carrier is a metal carrier, a metal plate, a copper plate, an aluminum plate, a copper wafer, or an aluminum wafer.
