# US 9,520,287 B2 · Semiconductor device having stacked oxide semiconductor layers > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,520,287 B2 - Document ID: US9520287B2 - Status: Granted - Kind: B2 - Application number: 14/296,893 - Filed: 2014-06-05 - Published: 2014-11-27 - Granted: 2016-12-13 - Earliest claimed: 2009-11-28 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Semiconductor Energy Laboratory Co., Ltd. - Inventors: Shunpei Yamazaki - Web page: https://patentgrep.com/patent/US9520287B2 ## CPC - H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate} - H10D 30/6756: {Amorphous oxide semiconductors} - H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)} - H10D 62/405: {Orientations of crystalline planes} - H10D 62/80: characterised by the materials - H10D 86/40: characterised by multiple TFTs - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10D 86/60: wherein the TFTs are in active matrices - H10P 14/22: using physical deposition, e.g. vacuum deposition or sputtering - H10P 14/2922: {being non-crystalline insulating materials, e.g. glass or polymers} - H10P 14/3226: {Oxides} - H10P 14/3234: {being oxide semiconducting materials (Group IIB-VIA semiconductors H10P14/3224)} - H10P 14/3238: {being insulating materials} - H10P 14/3426: {Oxides} - H10P 14/3434: {being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424)} - H10D 86/00: Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates - H10P 14/2921: {being crystalline insulating materials} - H10P 14/3248: {consisting of two layers} - H10P 14/3454: {Amorphous} - H10P 14/3802: {Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth} - Y10T 156/10: Methods of surface bonding and/or assembly therefor - Y10T 428/24174: including sheet or component perpendicular to plane of web or sheet - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 - Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION ## Abstract One embodiment is a method for manufacturing a stacked oxide material, including the steps of forming an oxide component over a base component; forming a first oxide crystal component which grows from a surface toward an inside of the oxide component by heat treatment, and leaving an amorphous component just above a surface of the base component; and stacking a second oxide crystal component over the first oxide crystal component. In particular, the first oxide crystal component and the second oxide crystal component have common c-axes. Same-axis (axial) growth in the case of homo-crystal growth or hetero-crystal growth is caused. ## Claims ### Claim 1 A semiconductor device comprising: a gate electrode; a gate insulating film over the gate electrode; a first oxide semiconductor layer over the gate insulating film; a second oxide semiconductor layer over the first oxide semiconductor layer; a third oxide semiconductor layer over the second oxide semiconductor layer; and a source electrode and a drain electrode electrically connected to the second oxide semiconductor layer, wherein the second oxide semiconductor layer comprises a channel formation region which overlaps with the gate electrode with the first oxide semiconductor layer and the gate insulating film interposed therebetween, and wherein the second oxide semiconductor layer comprises crystals which are c-axis-aligned. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, further comprising: an insulating film over and in contact with the third oxide semiconductor layer; and a conductive layer over the insulating film, wherein the gate electrode and the conductive layer overlap with each other with the channel formation region interposed therebetween. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein the first oxide semiconductor layer comprises an amorphous region. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, wherein the third oxide semiconductor layer comprises crystals which are c-axis-aligned. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein the c-axes of the crystals in the second oxide semiconductor layer are aligned perpendicular to a surface of the second oxide semiconductor layer. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, wherein each of the first oxide semiconductor layer, the second oxide semiconductor layer and the third oxide semiconductor layer contains indium and zinc. ### Claim 7 A semiconductor device comprising: a gate electrode; a gate insulating film; a first oxide semiconductor layer; a second oxide semiconductor layer; a third oxide semiconductor layer; and a source electrode and a drain electrode electrically connected to the second oxide semiconductor layer, wherein the second oxide semiconductor layer is between the first oxide semiconductor layer and the third oxide semiconductor layer, wherein the second oxide semiconductor layer comprises a channel formation region, wherein the gate electrode and the channel formation region overlap with each other with the first oxide semiconductor layer and the gate insulating film interposed therebetween, and wherein the second oxide semiconductor layer comprises crystals which are c-axis-aligned. ### Claim 8 (depends on 7) The semiconductor device according to claim 7, wherein the first oxide semiconductor layer comprises an amorphous region. ### Claim 9 (depends on 7) The semiconductor device according to claim 7, wherein the third oxide semiconductor layer comprises crystals which are c-axis-aligned. ### Claim 10 (depends on 7) The semiconductor device according to claim 7, wherein the c-axes of the crystals in the second oxide semiconductor layer are aligned perpendicular to a surface of the second oxide semiconductor layer. ### Claim 11 (depends on 7) The semiconductor device according to claim 7, wherein each of the second oxide semiconductor layer and the third oxide semiconductor layer contains indium, gallium and zinc, and wherein composition ratio of the second oxide semiconductor layer and the third oxide semiconductor layer are different from each other. ### Claim 12 (depends on 7) The semiconductor device according to claim 7, wherein a material of the second oxide semiconductor layer and a material of the third oxide semiconductor layer are different from each other. ### Claim 13 A semiconductor device comprising: a gate electrode; a gate insulating film; an oxide semiconductor layer comprising a first oxide semiconductor layer, a second oxide semiconductor layer over the first oxide semiconductor layer, and a third oxide semiconductor layer over the second oxide semiconductor layer; and a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, wherein a relation of Ec−Ef