# US 9,520,086 B2 · Display apparatus, power voltage generating apparatus, and method of generating power voltage > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,520,086 B2 - Document ID: US9520086B2 - Status: Granted - Kind: B2 - Application number: 14/249,319 - Filed: 2014-04-09 - Published: 2015-05-14 - Granted: 2016-12-13 - Earliest claimed: 2013-11-11 - Assignees: Samsung Display Co., Ltd. - Applicants: Samsung Display Co., Ltd. - Inventors: Jong-Man Bae; Byeong-Doo Kang; Jin-Woo Kim; Kyoung-Jin Park - Web page: https://patentgrep.com/patent/US9520086B2 ## CPC - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 2330/02: Details of power systems and of start or stop of display operation - G09G 2330/028: Generation of voltages supplied to electrode drivers in a matrix display other than LCD - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A power voltage generating apparatus supplies a power voltage to a plurality of pixel circuits of a display apparatus. The power voltage generating apparatus includes: a high voltage converter to generate a high voltage; a low voltage converter to generate a low voltage; a switching circuit to alternately output the high voltage and the low voltage at a power voltage terminal as the power voltage; and a discharging unit coupled to the power voltage terminal and configured to discharge the power voltage terminal until a voltage output is converted from the high voltage to the low voltage by using the switching circuit. ## Claims ### Claim 1 A power voltage generating apparatus for supplying a power voltage to a plurality of pixel circuits of a display apparatus, the power voltage generating apparatus comprising: a high voltage converter to generate a high voltage; a low voltage converter to generate a low voltage; a switching circuit to alternately output the high voltage and the low voltage at a power voltage terminal as the power voltage; and a discharging unit coupled to the power voltage terminal and configured to discharge the power voltage terminal in a discharge period before the switching circuit changes the power voltage from the high voltage to the low voltage, wherein the discharge period comprises a first period in which the discharging unit gradually discharges the high voltage to a discharge voltage at the power voltage terminal, and a second period after the first period in which a voltage of the power voltage terminal is maintained as the discharge voltage. ### Claim 2 (depends on 1) The power voltage generating apparatus of claim 1, wherein the discharging unit comprises: a resistor coupled to the power voltage terminal; a transistor coupled between the resistor and a ground; and a gate driver coupled to a gate electrode of the transistor. ### Claim 3 (depends on 2) The power voltage generating apparatus of claim 2, wherein the gate driver is configured to turn on the transistor for a period of time before the switching circuit converts an output voltage from the high voltage to the low voltage. ### Claim 4 (depends on 3) The power voltage generating apparatus of claim 3, wherein the discharge voltage is a ground level which is lower than the low voltage. ### Claim 5 (depends on 3) The power voltage generating apparatus of claim 3, wherein the discharge voltage has a voltage level which is between the high voltage and the low voltage. ### Claim 6 (depends on 2) The power voltage generating apparatus of claim 2, wherein the transistor comprises an NMOS transistor. ### Claim 7 (depends on 2) The power voltage generating apparatus of claim 2, wherein the resistor comprises a variable resistor. ### Claim 8 (depends on 2) The power voltage generating apparatus of claim 2, wherein the gate driver is configured to turn on the transistor for the first period and to turn off the transistor for the second period. ### Claim 9 (depends on 1) The power voltage generating apparatus of claim 1, wherein the switching circuit comprises: first and second transistors coupled between the high voltage converter and the power voltage terminal; third and fourth transistors coupled between the low voltage converter and the power voltage terminal; a first gate driver to apply a first voltage to the first and second transistors; and a second gate driver to apply a second voltage to the third and fourth transistors. ### Claim 10 (depends on 9) The power voltage generating apparatus of claim 9, wherein each of the first, second, third, and fourth transistors comprises a PMOS transistor. ### Claim 11 (depends on 9) The power voltage generating apparatus of claim 9, wherein the switching circuit is to output the high voltage at the power voltage terminal when the first gate driver turns on the first and second transistors, and the second gate driver turns off the third and fourth transistors, and the switching circuit is to output the low voltage at the power voltage terminal when the first gate driver turns off the first and second transistors, and the second gate driver turns on the third and fourth transistors. ### Claim 12 A method of generating a power voltage supplied to a pixel unit of a display apparatus, the method comprising: outputting a high voltage at a power voltage terminal, wherein the outputting is performed by a switching circuit, and a discharging unit coupled to the power voltage terminal is turned off; discharging a voltage of the power voltage terminal as the discharging unit is turned on; and outputting a low voltage at the power voltage terminal, wherein the outputting is performed by the switching circuit, and the discharging unit is turned off, wherein the switching circuit alternately outputs the high voltage and the low voltage as a power voltage, and the discharging unit is coupled to the switching circuit, and wherein the discharging comprises: gradually discharging the power voltage from high voltage to a discharge voltage at the power voltage terminal in a first period of a discharge period; and maintaining the discharge voltage at the power voltage terminal in a second period of the discharge period after the first period. ### Claim 13 (depends on 12) The method of claim 12, wherein the discharging unit comprises a resistor, a transistor coupled between the resistor and a ground, and a gate driver coupled to a gate electrode of the transistor, wherein when the transistor is turned on, the discharging unit is turned on, and when the transistor is turned off, the discharging unit is turned off. ### Claim 14 (depends on 13) The method of claim 13, wherein the resistor comprises a variable resistor, and a level of the discharging voltage and a time for changing the discharge voltage to the low voltage is varied according to a resistance value of the variable resistor. ### Claim 15 (depends on 12) The method of claim 12, wherein the switching circuit comprises: first and second transistors coupled between a high voltage converter and the power voltage terminal; and third and fourth transistors coupled between a low voltage converter and the power voltage terminal. ### Claim 16 (depends on 15) The method of claim 15, wherein the outputting of the high voltage comprises: turning on the first and second transistors while turning off the third and fourth transistors and the discharging unit; and maintaining the high voltage while turning off the first, second, third, and fourth transistors and the discharging unit. ### Claim 17 (depends on 15) The method of claim 15, wherein the outputting of the low voltage comprises: turning off the first and second transistors and the discharging unit while turning on the third and fourth transistors; and maintaining the low voltage while turning off the first, second, third, and fourth transistors and the discharging unit. ### Claim 18 (depends on 15) The method of claim 15, wherein the discharging comprises: turning off the first, second, third, and fourth transistors and turning on the discharging unit; and subsequently turning off the first, second, third, and fourth transistors and the discharging unit. ### Claim 19 A display apparatus comprising: a plurality of pixel circuits; a data driver to generate a data driving signal to output the data driving signal to the plurality of pixel circuits; a scanning driver to generate a scan signal to output the scan signal to the plurality of pixel circuits; and a power voltage generator to generate a power voltage and output the power voltage through a power voltage terminal to the plurality of pixel circuits, wherein the power voltage generator is to alternately output a high voltage and a low voltage at the power voltage terminal as the power voltage, and comprises a discharging unit to discharge the power voltage terminal in a discharge period before the power voltage is changed from the high voltage to the low voltage, wherein the power voltage generator gradually discharges the power voltage from the high voltage to a discharge voltage at the power voltage terminal in a first period of the discharge period, and maintains the discharge voltage at the power voltage terminal in a second period of the discharge period.