# US 9,519,947 B2 · Architecture and instructions for accessing multi-dimensional formatted surface memory

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- Number: US 9,519,947 B2
- Document ID: US9519947B2
- Status: Granted
- Kind: B2
- Application number: 12/890,171
- Filed: 2010-09-24
- Published: 2011-03-31
- Granted: 2016-12-13
- Earliest claimed: 2009-09-25
- Assignees: NVIDIA Corporation
- Applicants: John R. Nickolls; Brian Fahs; Lars Nyland; John Erik Lindholm; Richard Craig Johnson
- Inventors: John R. Nickolls; Brian Fahs; Lars Nyland; John Erik Lindholm; Richard Craig Johnson
- Web page: https://patentgrep.com/patent/US9519947B2

## CPC

- G06T 1/60: Memory management
- G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL

## Abstract

One embodiment of the present invention sets forth a technique for a program to access multi-dimensional formatted graphics surface memory. Multi-dimensional memory objects called “surfaces” stored in a user-specified data or pixel format and arranged in a graphics optimized layout are accessed by programs using surface instructions. A set of memory access instructions e.g., load, store, reduce, and atomic, referred to as surface instructions, may be used to access the surfaces. Coordinate bounds checking is performed with configurable clamping. Caching behavior may also be specified by the surface instructions. Data format conversion and packing to a specified storage format is supported for store, reduction, and atomic surface instructions. Data format conversion and unpacking from a specified storage format is supported for loads and atomic surface instructions.

## Claims

### Claim 1

A method for accessing multi-dimensional formatted surface memory by a program, comprising:
receiving a surface instruction that specifies an x-coordinate of a sample and a y-coordinate of the sample, wherein the sample is associated with a multi-dimensional formatted surface;
computing an address of a location in the multi-dimensional formatted surface memory based on the x-coordinate, the y-coordinate, and attributes of the multi-dimensional formatted surface, by computing a plurality of address fields included in the address, wherein two or more address fields in the plurality of address fields comprise one or more bits corresponding to the x-coordinate and one or more bits corresponding to the y-coordinate; and
accessing the sample via the address;
wherein:
a first address field in the plurality of address fields identifies a block within the multi-dimensional formatted surface, and
a second address field in the plurality of address fields identifies a group of blocks (GOB) within the block.

### Claim 2 (depends on 1)

The method of claim 1, wherein the surface instruction specifies the coordinates in bytes.

### Claim 3 (depends on 1)

The method of claim 1, wherein the multi-dimensional formatted surface is configured by the program to access the samples in a pattern using multi-dimensional tiled addressing.

### Claim 4 (depends on 1)

The method of claim 1, further comprising:
determining that the location is out-of-bounds of the multi-dimensional formatted surface; and
returning a default value for the surface instruction based on a mode specified by the surface instruction.

### Claim 5 (depends on 1)

The method of claim 1, further comprising:
determining that the location is out-of-bounds of the multi-dimensional formatted surface; and
discarding the surface instruction based on a mode specified by the surface instruction.

### Claim 6 (depends on 1)

The method of claim 1, further comprising:
determining that the location is out-of-bounds of the multi-dimensional formatted surface; and
reading data stored at a nearest location that is nearest to the location within the multi-dimensional formatted surface based on a mode specified by the surface instruction.

### Claim 7 (depends on 1)

The method of claim 1, further comprising:
determining that the location is out-of-bounds of the multi-dimensional formatted surface; and
writing data to a nearest location that is nearest to the location within the multi-dimensional formatted surface based on a mode specified by the surface instruction.

### Claim 8 (depends on 1)

The method of claim 1, further comprising caching data read from or written to the location based on a mode specified by the surface instruction.

### Claim 9 (depends on 1)

The method of claim 1, further comprising:
receiving a second surface instruction that is configured to query an attribute of the multi-dimensional formatted surface; and
returning the attribute of the multi-dimensional formatted surface.

### Claim 10 (depends on 1)

The method of claim 1, further comprising:
determining that the surface instruction is configured to store data to the multi-dimensional formatted surface; and
configuring a parallel thread processor that is coupled to the multi-dimensional formatted surface memory to convert the data to a format specified for the multi-dimensional formatted surface by the program before storing the data.

### Claim 11 (depends on 1)

The method of claim 1, further comprising:
determining that the surface instruction is configured to load data from the multi-dimensional formatted surface; and
configuring a parallel thread processor that is coupled to the multi-dimensional formatted surface memory to convert the data from a format specified for the multi-dimensional formatted surface by the program before returning the data.

### Claim 12 (depends on 1)

The method of claim 1, further comprising:
determining that the surface instruction is configured to perform an atomic operation on data from the multi-dimensional formatted surface; and
configuring a parallel thread processor that is coupled to the multi-dimensional formatted surface memory to convert the data from a format specified for the multi-dimensional formatted surface by the program before performing the atomic operation on the data.

### Claim 13 (depends on 1)

The method of claim 1, further comprising:
determining that the surface instruction is configured to perform an atomic reduction operation on data from the multi-dimensional formatted surface; and
configuring a parallel thread processor that is coupled to the multi-dimensional formatted surface memory to convert the data from a format specified for the multi-dimensional formatted surface by the program before performing the atomic reduction operation on the data.

### Claim 14 (depends on 1)

The method of claim 1, wherein the surface instruction is configured to load data from the multi-dimensional formatted surface, store data to the multi-dimensional formatted surface, query an attribute of the multi-dimensional formatted surface, perform an atomic operation on data from the multi-dimensional formatted surface, or perform an atomic reduction operation on data from the multi-dimensional formatted surface.

### Claim 15 (depends on 1)

The method of claim 1, wherein the surface instruction comprises a query to obtain the attributes of the multi-dimensional formatted surface.

### Claim 16 (depends on 1)

The method of claim 1, wherein a third address field in the plurality of address fields identifies a cache line in the GOB.

### Claim 17 (depends on 16)

The method of claim 16, wherein a fourth address field in the plurality of address fields identifies a sector in the cache line.

### Claim 18 (depends on 17)

The method of claim 17, wherein a fifth address field in the plurality of address fields identifies a byte in the sector.

### Claim 19

A non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor executing a program to access a multi-dimensional formatted surface memory, by performing the steps of:
receiving a surface instruction that specifies an x-coordinate of a sample and a y-coordinate of the sample, wherein the sample is associated with a multi-dimensional formatted surface;
computing an address of a location in the multi-dimensional formatted surface memory based on the x-coordinate, the y-coordinate, and attributes of the multi-dimensional formatted surface, by computing a plurality of address fields included in the address, wherein two or more address fields in the plurality of address fields comprise one or more bits corresponding to the x-coordinate and one or more bits corresponding to the y-coordinate; and
accessing the sample via the address;
wherein:
a first address field in the plurality of address fields identifies a block within the multi-dimensional formatted surface, and
a second address field in the plurality of address fields identifies a group of blocks (GOB) within the block.

### Claim 20 (depends on 19)

A computer-readable storage medium of claim 19, wherein the surface instruction specifies the coordinates in bytes.

### Claim 21 (depends on 19)

A computer-readable storage medium of claim 19, wherein the multi-dimensional formatted surface is configured by the program to access the samples in a pattern using multi-dimensional tiled addressing.

### Claim 22 (depends on 19)

A computer-readable storage medium of claim 19, further comprising:
determining that the location is out-of-bounds of the multi-dimensional formatted surface; and
returning a default value for the instruction based on a mode specified by the surface instruction.

### Claim 23 (depends on 19)

A computer-readable storage medium of claim 19, further comprising caching data read from or written to the location based on a mode specified by the surface instruction.

### Claim 24 (depends on 19)

The non-transitory computer-readable storage medium of claim 19, wherein the surface instruction comprises a query to obtain the attributes of the multi-dimensional formatted surface.

### Claim 25

A system comprising:
a multi-dimensional formatted surface memory; and
a parallel thread processor coupled to the multi-dimensional formatted surface memory and configured to:
receive a surface instruction that specifies an x-coordinate of a sample and a y-coordinate of the sample, wherein the sample is associated with a multi-dimensional formatted surface;
compute an address of a location in the multi-dimensional formatted surface memory based on the x-coordinate, the y-coordinate, and attributes of the multi-dimensional formatted surface, by computing a plurality of address fields included in the address, wherein two or more address fields in the plurality of address fields comprise one or more bits corresponding to the x-coordinate and one or more bits corresponding to the y-coordinate; and
access the sample via the address;
wherein:
a first address field in the plurality of address fields identifies a block within the multi-dimensional formatted surface, and
a second address field in the plurality of address fields identifies a group of blocks (GOB) within the block.

### Claim 26 (depends on 25)

The system of claim 25, wherein the surface instruction comprises a query to obtain the attributes of the multi-dimensional formatted surface.

### Claim 27

A method for accessing multi-dimensional formatted surface memory by a program, comprising:
receiving a surface instruction that specifies an x-coordinate of a sample and a y-coordinate of the sample, wherein the sample is associated with a multidimensional formatted surface;
computing an address of a location in the multi-dimensional formatted surface memory based on the x-coordinate, the y-coordinate, and attributes of the multi-dimensional formatted surface, by computing a plurality of address fields included in the address, wherein two or more address fields in the plurality of address fields comprise one or more bits corresponding to the x-coordinate and one or more bits corresponding to the y-coordinate; and accessing the sample via the address;
wherein:
a first address field in the plurality of address fields identifies a block within the multi-dimensional formatted surface and is computed based on a first bit corresponding to the x-coordinate and a first bit corresponding to the y-coordinate,
a second address field in the plurality of address fields identifies a group of blocks (GOB) within the block and is computed based on a second bit corresponding to the x-coordinate and a second bit corresponding to the y-coordinate,
a third address field in the plurality of address fields identifies a cache line in the GOB and is computed based on a third bit corresponding to the x-coordinate and a third bit corresponding to the y-coordinate,
a fourth address field in the plurality of address fields identifies a sector in the cache line and is computed based on a fourth bit corresponding to the x-coordinate and a fourth bit corresponding to the y-coordinate, and
a fifth address field in the plurality of address fields identifies a byte in the sector and is computed based on a fifth bit corresponding to the x-coordinate and a fifth bit corresponding to the y-coordinate.
