# US 9,519,747 B1 · Dynamic and adaptive timing sensitivity during static timing analysis using look-up table

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- Number: US 9,519,747 B1
- Document ID: US9519747B1
- Status: Granted
- Kind: B1
- Application number: 14/751,222
- Filed: 2015-06-26
- Published: 2016-12-29
- Granted: 2016-12-13
- Earliest claimed: 2015-06-26
- Assignees: Globalfoundries Inc.
- Applicants: Globalfoundries Inc.
- Inventors: Nathan Buck; Brian M. Dreibelbis; John P. Dubuque; Eric A. Foreman; David J. Hathaway; Jeffrey G. Hemmett; Kerim Kalafala; Gregory M. Schaeffer; Stephen G. Shuma; Natesan Venkateswaran; Chandramouli Visweswariah; Vladimir Zolotov
- Web page: https://patentgrep.com/patent/US9519747B1

## CPC

- G06F 30/398: Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36)
- G06F 30/23: using finite element methods [FEM] or finite difference methods [FDM]
- G06F 30/33: Design verification, e.g. functional simulation or model checking
- G06F 30/3312: Timing analysis
- G06F 30/3315: using static timing analysis [STA]
- G06F 30/367: Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
- G06F 2119/12: Timing analysis or timing optimisation
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Methods and systems receive an integrated circuit design into a computerized device and perform an analysis of the integrated circuit design to identify characteristics of physical features of portions of the integrated circuit design. Such methods and systems determine whether to look up sensitivity of a timing value of a portion of the integrated circuit design to manufacturing process variables, voltage variables, and temperature variables (PVT variables) by: evaluating relationships between the characteristics of physical features of the portion of the integrated circuit design to generate an indicator value; and, based on whether the indicator value is within a table usage filter value range, either: calculating the sensitivity of the timing value to the PVT variables; or looking up a previously determined sensitivity of the timing value to the PVT variables from a look-up table.

## Claims

### Claim 1

A method for performing a static timing analysis used in integrated circuit chip design, said method comprising:
receiving an integrated circuit design into a computerized device;
performing an analysis of said integrated circuit design to identify characteristics of physical features of portions of said integrated circuit design, using said computerized device; and
determining sensitivities of timing values of different portions, respectively, of said integrated circuit design to manufacturing process variables, voltage variables, and temperature variables (PVT variables), using said computerized device, wherein, for each portion of said integrated circuit design, a sensitivity of a timing value is determined by:
evaluating, by said computerized device, relationships between said characteristics of physical features of said portion of said integrated circuit design to generate an indicator value;
determining whether said indicator value is outside or within a table usage filter value range;
when said indicator value is outside said table usage filter value range, calculating, by said computerized device, a calculated sensitivity value for said sensitivity of said timing value to said PVT variables; and
when said indicator value is within said table usage filter range, looking up, by said computerized device, a previously determined sensitivity value for said sensitivity of said timing value to said PVT variables from a look-up table, wherein said look-up table is stored in a memory that is accessible by said computerized device and wherein using said look-up table reduces a runtime and memory requirements for said static timing analysis while maintaining accuracy.

### Claim 2 (depends on 1)

The method according to claim 1, said determining of said sensitivities comprising: using previously established sensitivity importance criteria to use different table usage filter value ranges for different portions of said integrated circuit design.

### Claim 3 (depends on 2)

The method according to claim 2, said previously established sensitivity importance criteria being different for at least one of:
different physical layers of said integrated circuit design;
different physical locations of said integrated circuit design;
different materials within said integrated circuit design; and
different parameters of said PVT variables.

### Claim 4 (depends on 1)

The method according to claim 1, said evaluating of said relationships between said characteristics of physical features of said portion of said integrated circuit design comprising calculating ratios of physical sizes, electrical values, and timing values of said physical features.

### Claim 5 (depends on 1)

The method according to claim 1, further comprising updating said look-up table during determining of said sensitivity of said timing value to said PVT variables.

### Claim 6 (depends on 5)

The method according to claim 5, said updating using results from said calculating of said calculated sensitivity value for said sensitivity of said timing value to said PVT variables to update said look-up table.

### Claim 7 (depends on 1)

The method according to claim 1, said calculating of said calculated sensitivity value for said sensitivity of said timing value to said PVT variables comprising one of:
finite differences modeling;
current source modeling; and
non-linear delay modeling.

### Claim 8

A method for performing a static timing analysis used in integrated circuit chip design, said method comprising:
creating a look-up table of previously determined timing value sensitivity with respect to characteristics of physical features of portions of integrated circuit designs and storing said look-up table in a memory accessible by a computerized device;
receiving an integrated circuit design into said computerized device;
performing an analysis of said integrated circuit design to identify characteristics of physical features of portions of said integrated circuit design, using said computerized device; and
determining sensitivities of timing values of different portions, respectively, of said integrated circuit design to manufacturing process variables, voltage variables, and temperature variables (PVT variables), using said computerized device, wherein, for each portion of said integrated circuit design, a sensitivity of a timing value is determined by:
evaluating, by said computerized device, relationships between said characteristics of physical features of said portion of said integrated circuit design to generate an indicator value;
determining whether said indicator value is outside or within a table usage filter value range;
when said indicator value is within said table usage filter value range, calculating, by said computerized device, a calculated sensitivity value for said sensitivity of said timing value to said PVT variables; and
when said indicator value is within said table usage filter range, looking up a previously determined sensitivity value for said sensitivity of said timing value to said PVT variables from said look-up table, wherein using said look-up table reduces a runtime and memory requirements for said static timing analysis while maintaining accuracy.

### Claim 9 (depends on 8)

The method according to claim 8, said determining of said sensitivities comprising: using previously established sensitivity importance criteria to use different table usage filter value ranges for different portions of said integrated circuit design.

### Claim 10 (depends on 9)

The method according to claim 9, said previously established sensitivity importance criteria being different for at least one of:
different physical layers of said integrated circuit design;
different physical locations of said integrated circuit design;
different materials within said integrated circuit design; and
different parameters of said PVT variables.

### Claim 11 (depends on 8)

The method according to claim 8, said evaluating of said relationships between said characteristics of physical features of said portion of said integrated circuit design comprising calculating ratios of physical sizes, electrical values, and timing values of said physical features.

### Claim 12 (depends on 8)

The method according to claim 8, further comprising updating said look-up table during determining of said sensitivity of said timing value to said PVT variables.

### Claim 13 (depends on 12)

The method according to claim 12, said updating using results from said calculating of said calculated sensitivity value for said sensitivity of said timing value to said PVT variables to update said look-up table.

### Claim 14 (depends on 8)

The method according to claim 8, said calculating of said calculated sensitivity value for said sensitivity of said timing value to said PVT variables comprising one of:
finite differences modeling;
current source modeling; and
non-linear delay modeling.

### Claim 15

A computer program product for performing an analysis, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, wherein the computer readable storage medium is not a transitory signal per se, the program instructions being executable by a computerized device to cause the computerized device to perform a method for performing a static timing analysis used in integrated circuit chip design, the method comprising:
creating a look-up table of previously determined timing value sensitivity with respect to characteristics of physical features of portions of integrated circuit designs and storing said look-up table in a memory accessible by said computerized device;
receiving an integrated circuit design into said computerized device;
performing an analysis of said integrated circuit design to identify characteristics of physical features of portions of said integrated circuit design, using said computerized device; and
determining sensitivities of timing values of different portions, respectively, of said integrated circuit design to manufacturing process variables, voltage variables, and temperature variables (PVT variables), using said computerized device, wherein, for each of portion of said integrated circuit design, a sensitivity of a timing value is determined by:
evaluating relationships between said characteristics of physical features of said portion of said integrated circuit design to generate an indicator value;
determining whether said indicator value is outside or within a table usage filter value range;
when said indicator value is outside said table usage filter value range, calculating a calculated sensitivity value for said sensitivity of said timing value to said PVT variables; and
when said indicator value is within said table usage filter range, looking up a previously determined sensitivity value for said sensitivity of said timing value to said PVT variables from said look-up table, wherein using said look-up table reduces a runtime and memory requirements for said static timing analysis while maintaining accuracy.

### Claim 16 (depends on 15)

The computer program product according to claim 15, said determining of said sensitivities comprising: using previously established sensitivity importance criteria to use different table usage filter value ranges for different portions of said integrated circuit design.

### Claim 17 (depends on 16)

The computer program product according to claim 16, said previously established sensitivity importance criteria being different for at least one of:
different physical layers of said integrated circuit design;
different physical locations of said integrated circuit design;
different materials within said integrated circuit design; and
different parameters of said PVT variables.

### Claim 18 (depends on 15)

The computer program product according to claim 15, said evaluating of said relationships between said characteristics of physical features of said portion of said integrated circuit design comprising calculating ratios of physical sizes, electrical values, and timing values of said physical features.

### Claim 19 (depends on 15)

The computer program product according to claim 15, further comprising updating said look-up table during determining of said sensitivity of said timing value to said PVT variables.

### Claim 20 (depends on 19)

The computer program product according to claim 19, said updating using results from said calculating of said calculated sensitivity value for said sensitivity of said timing value to said PVT variables to update said look-up table.
