# US 9,519,584 B2 · System and method for updating data in a cache > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,519,584 B2 - Document ID: US9519584B2 - Status: Granted - Kind: B2 - Application number: 15/136,304 - Filed: 2016-04-22 - Published: 2016-08-18 - Granted: 2016-12-13 - Earliest claimed: 2012-08-07 - Assignees: Dell Products L.P. - Applicants: Dell Products L.P. - Inventors: Scott David Peterson; Gus Shaffer; Phillip Krueger - Web page: https://patentgrep.com/patent/US9519584B2 ## CPC - G06F 12/0813: with a network or matrix configuration - G06F 12/084: with a shared cache - G06F 12/0873: Mapping of cache memory to specific storage devices or parts thereof - G06F 12/121: using replacement algorithms - G06F 2212/1016: Performance improvement - G06F 2212/154: Networked environment - G06F 2212/284: being distributed - G06F 2212/60: Details of cache memory - G06F 2212/62: Details of cache specific to multiprocessor cache arrangements - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract In one embodiment, a computing system includes a cache having one or more memories and a cache manager. The cache manager is able to receive a request to write data to a first portion of the cache, write the data to the first portion of the cache, update a first map corresponding to the first portion of the cache, receive a request to read data from the first portion of the cache, read from a storage communicatively linked to the computing system data according to the first map, and update a second map corresponding to the first portion of the cache. The cache manager may also be able to write data to the storage according to the first map. ## Claims ### Claim 1 A method comprising: receiving, at a computing device, a request to write data to a portion of a cache, the computing device comprising a memory, the computing device further comprising a cache manager; writing the data to the portion of the cache; updating, at the cache manager, a first map corresponding to the portion of the cache, wherein the first map comprises a set of bits, each bit corresponding to a subset of the portion of the cache, and wherein each bit in the first map indicates whether data in the corresponding subset of the portion of the cache has been written to a storage; receiving a request to read data from the portion of the cache, wherein the request is intercepted by the cache manager; reading from the storage communicatively linked to the computing device data according to the first map, wherein reading from the storage data according to the first map comprises reading from the storage data corresponding to the subsets of the portion of the cache that, according to the first map, do not include data that has not been written to the storage; updating, at the cache manager, a second map corresponding to the portion of the cache; setting a flag based, at least in part, on the second map; and receiving a second request to read directly from the first portion of the cache based, at least in part, on the second map. ### Claim 2 (depends on 1) The method of claim 1, further comprising writing data to the storage according to the first map. ### Claim 3 (depends on 1) The method of claim 1, wherein the first map utilizes a 64-bit mapping. ### Claim 4 (depends on 1) The method of claim 1, wherein the second map utilizes a 64-bit mapping. ### Claim 5 (depends on 1) The method of claim 1, wherein the second map for the portion of the cache comprises a set of bits, each bit corresponding to a subset of the portion of the cache. ### Claim 6 (depends on 5) The method of claim 5, wherein each bit in the second map indicates whether data in the corresponding subset of the portion of the cache is valid for reading. ### Claim 7 One or more computer-readable non-transitory storage media embodying logic that is operable when executed to: receive, at a computing device comprising the media, a request to write data to a first portion of a cache, the computing device further comprising a memory and a cache manager; write the data to the first portion of the cache; update, at the cache manager, a first map corresponding to the first portion of the cache, wherein the first map comprises a set of bits, each bit corresponding to a subset of the portion of the cache, and wherein each bit in the first map indicates whether data in the corresponding subset of the portion of the cache has been written to a storage; receive a request to read data from the first portion of the cache, wherein the request is intercepted by the cache manager; read from the storage communicatively linked to the computing device data according to the first map, wherein reading from the storage data according to the first map comprises reading from the storage data corresponding to the subsets of the portion of the cache that, according to the first map, do not include data that has not been written to the storage; update, at the cache manager, a second map corresponding to the first portion of the cache; set a flag based, at least in part, on the second map; and receiving a second request to read directly from the first portion of the cache based, at least in part, on the second map. ### Claim 8 (depends on 7) The media of claim 7, wherein the logic is further operable when executed to write data to the storage according to the first map. ### Claim 9 (depends on 7) The media of claim 7, wherein the first map utilizes a 64-bit mapping. ### Claim 10 (depends on 7) The media of claim 7, wherein the second map utilizes a 64-bit mapping. ### Claim 11 (depends on 7) The media of claim 7, wherein the second map for the first portion of the cache comprises a set of bits, each bit corresponding to a subset of the first portion of the cache. ### Claim 12 (depends on 11) The media of claim 11, wherein each bit in the second map indicates whether data in the corresponding subset of the first portion of the cache is valid for reading. ### Claim 13 A computing system, comprising: a cache comprising one or more memories; and a cache manager; wherein the cache manager is operable to: receive a request to write data to a first portion of the cache; write the data to the first portion of the cache; update, at the cache manager, a first map corresponding to the first portion of the cache; receive a request to read data from the first portion of the cache; read from a storage communicatively linked to the computing system data according to the first map; update, at the cache manager, a second map corresponding to the first portion of the cache; setting a flag based, at least in part, on the second map; and permitting, upon receipt of a second request, a direct read of the first portion of cache based, at least in part, on the second map. ### Claim 14 (depends on 13) The computing system of claim 13, wherein the cache manager is further operable to write data to the storage according to the first map. ### Claim 15 (depends on 13) The computing system of claim 13, wherein the first map utilizes a 64-bit mapping. ### Claim 16 (depends on 15) The computing system of claim 15, wherein the second map utilizes a 64-bit mapping. ### Claim 17 (depends on 13) The computing system of claim 13, wherein the second map for the first portion of the cache comprises a set of bits, each bit corresponding to a subset of the first portion of the cache. ### Claim 18 (depends on 17) The computing system of claim 17, wherein each bit in the second map indicates whether data in the corresponding subset of the first portion of the cache is valid for reading. ### Claim 19 (depends on 13) The computing system of claim 13, wherein the request to write data to a first portion of a cache is from a client communicatively linked to the computing system. ### Claim 20 (depends on 13) The computing system of claim 13, wherein the first portion of the cache comprises a cache block.