# US 9,519,502 B2 · Virtual machine backup

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- Number: US 9,519,502 B2
- Document ID: US9519502B2
- Status: Granted
- Kind: B2
- Application number: 14/548,624
- Filed: 2014-11-20
- Published: 2015-05-21
- Granted: 2016-12-13
- Earliest claimed: 2013-11-21
- Assignees: Globalfoundries Inc.
- Applicants: GLOBALFOUNDRIES Inc.
- Inventors: Guy L. Guthrie; Naresh Nayar; Geraint North; William J. Starke; Albert J. Van Norstrand, Jr.
- Web page: https://patentgrep.com/patent/US9519502B2

## CPC

- G06F 9/45558: {Hypervisor-specific management and integration aspects}
- G06F 11/14: Error detection or correction of the data by redundancy in operations (error detection or correction of the data by redundancy in hardware G06F11/16)
- G06F 11/141: {for bus or memory accesses}
- G06F 11/1438: {Restarting or rejuvenating}
- G06F 11/1458: {Management of the backup or restore process}
- G06F 11/1484: {involving virtual machines}
- G06F 11/203: {using migration}
- G06F 11/2035: {without idle spare hardware}
- G06F 12/08: in hierarchically structured memory systems, e.g. virtual memory systems
- G06F 12/0804: with main memory updating (G06F12/0806 takes precedence)
- G06F 12/0806: Multiuser, multiprocessor or multiprocessing cache systems
- G06F 12/0833: {in combination with broadcast means (e.g. for invalidation or updating)}
- G06F 12/0855: Overlapped cache accessing, e.g. pipeline (G06F12/0846 takes precedence)
- G06F 12/128: adapted to multidimensional cache systems, e.g. set-associative, multicache, multiset or multilevel
- G06F 11/2046: {where the redundant components share persistent storage (G06F11/2043 takes precedence)}
- G06F 11/2097: {maintaining the standby controller/processing unit updated (initialisation or re-synchronisation thereof G06F11/1658 and subgroups)}
- G06F 2009/45583: {Memory management, e.g. access or allocation}
- G06F 2201/86: Event-based monitoring
- G06F 2212/151: Emulated environment, e.g. virtual machine
- G06F 2212/62: Details of cache specific to multiprocessor cache arrangements
- G06F 2212/621: Coherency control relating to peripheral accessing, e.g. from DMA or I/O device
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines, a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, periodically check the image modification flags and write only the memory address of the flagged cache rows in the defined log. The processor unit is further arranged to monitor the free space available in the defined log and to trigger an interrupt if the free space available falls below a specific amount.

## Claims

### Claim 1

A non-transitory computer program product for maintaining a backup image of a virtual machine, the non-transitory computer program product comprising:
a non-transitory computer readable storage medium having program instructions embodied therewith, the program instructions comprising program instructions to,
indicate, in a log, updates to memory of a virtual machine when the updates are evicted from a cache of the virtual machine;
determine a guard band for the log, wherein the guard band indicates a threshold amount of free space for the log;
determine that the guard band will be or has been encroached upon indicating an update in the log;
update a backup image of the virtual machine based, at least in part, on a set of one or more entries of the log, wherein the set of entries is sufficient to comply with the guard band; and
remove the set of entries from the log.

### Claim 2 (depends on 1)

The computer program product of claim 1, wherein the program instructions to determine a guard band comprise program instructions to:
determine a number of write-back cache lines in the cache;
determine a number of instructions in a pipeline for a processor unit that executes instructions issued by the virtual machine;
determine a number of additional instructions capable of being issued to the pipeline in an amount of time taken to trigger an interrupt of the processor unit; and
define the guard band based on a sum of the determined number of write-back cache lines, the determined number of instructions, and the determined number of additional instructions.

### Claim 3 (depends on 1)

The computer program product of claim 1, wherein the program instructions to determine a guard band comprise program instructions to:
determine a number of dirty cache lines in the cache;
determine a number of store instructions in a pipeline for a processor that executes instructions issued by the virtual machine;
determine a number of additional instructions capable of being issued to the pipeline in an amount of time taken to trigger an interrupt of the processor unit; and
define the guard band based on a sum of the determined number of dirty cache lines, the determined number of store instructions, and the determined number of additional instructions.

### Claim 4 (depends on 3)

The computer program product of claim 3 further having program instructions to redefine the guard band in response to determining that another cache line has become dirty or that an additional store instruction has been issued to the pipeline.

### Claim 5 (depends on 1)

The computer program product of claim 1 further having program instructions to mark a cache line in the cache of the virtual machine for logging in response to modification of the cache line.

### Claim 6 (depends on 1)

The computer program product of claim 1, wherein each of the set of entries indicates a memory address of the virtual machine and data written to the memory address of the virtual machine, wherein the program instructions to update the backup image based, at least in part, on the set of entries comprise program instructions to indicate, for each memory address and data indicated in the set of entries, the data for updating a corresponding memory address of the backup image.

### Claim 7

An apparatus comprising:
a processor; and
a computer readable storage medium having program instructions embodied therewith,
the program instructions executable by the processor to cause the apparatus to, indicate, in a log, updates to memory of a virtual machine when the updates are evicted
from a cache of the virtual machine;
determine a guard band for the log, wherein the guard band indicates a threshold amount of free space for the log;
determine that the guard band will be or has been encroached upon indicating an update in the log;
update a backup image of the virtual machine based, at least in part, on a set of one or more entries of the log, wherein the set of entries is sufficient to comply with the guard band; and
remove the set of entries from the log.

### Claim 8 (depends on 7)

The apparatus of claim 7, wherein the program instructions executable by the processor to cause the apparatus to determine a guard band comprises the program instructions executable by the processor to cause the apparatus to:
determine a number of write-back cache lines in the cache;
determine a number of instructions in a pipeline for the processor;
determine a number of additional instructions capable of being issued to the pipeline in an amount of time taken to trigger an interrupt of the processor; and
define the guard band based on a sum of the determined number of write-back cache lines, the determined number of instructions, and the determined number of additional instructions.

### Claim 9 (depends on 7)

The apparatus of claim 7, wherein the program instructions executable by the processor to cause the apparatus to determine a guard band comprises the program instructions executable by the processor to cause the apparatus to:
determine a number of dirty cache lines in the cache;
determine a number of store instructions in a pipeline for the processor;
determine a number of additional instructions capable of being issued to the pipeline in an amount of time taken to trigger an interrupt of the processor; and
define the guard band based on a sum of the determined number of dirty cache lines, the determined number of store instructions, and the determined number of additional instructions.

### Claim 10 (depends on 7)

The apparatus of claim 7, wherein the cache of the virtual machine comprises a write-through cache, wherein the program instructions executable by the processor to cause the apparatus to indicate in the log updates to memory of a virtual machine are in response to updates by the virtual machine to a cache line in the cache.

### Claim 11 (depends on 7)

The apparatus of claim 7, wherein the computer readable storage medium further has program instructions executable by the processor to cause the apparatus to mark a cache line in the cache of the virtual machine for logging in response to modification of the cache line.

### Claim 12 (depends on 7)

The apparatus of claim 7, wherein each of the set of entries indicates a memory address of the virtual machine and data written to the memory address of the virtual machine, wherein the program instructions executable by the processor to cause the apparatus to update the backup image based, at least in part, on the set of entries comprises the program instructions executable by the processor to cause the apparatus to indicate, for each memory address and data indicated in the set of entries, the data for updating a corresponding memory address of the backup image.

### Claim 13

A method comprising:
indicating, in a log, updates to memory of a virtual machine when the updates are evicted from a cache of the virtual machine;
determining a guard band for the log, wherein the guard band indicates a threshold amount of free space for the log;
determining that the guard band will be or has been encroached upon indicating an update in the log;
updating a backup image of the virtual machine based, at least in part, on a set of one or more entries of the log, wherein the set of entries is sufficient to comply with the guard band; and
removing the set of entries from the log.

### Claim 14 (depends on 13)

The method of claim 13, wherein said determining a guard band comprises:
determining a number of write-back cache lines in the cache;
determining a number of instructions in a pipeline for a processor unit that executes instructions issued by the virtual machine;
determining a number of additional instructions capable of being issued to the pipeline in an amount of time taken to trigger an interrupt of the processor unit; and defining the guard band based on a sum of the determined number of write-back cache lines, the determined number of instructions, and the determined
number of additional instructions.

### Claim 15 (depends on 13)

The method of claim 13, wherein said determining a guard band comprises: determining a number of dirty cache lines in the cache;
determining a number of store instructions in a pipeline for a processor unit that executes instructions issued by the virtual machine;
determining a number of additional instructions capable of being issued to the pipeline in an amount of time taken to trigger an interrupt of the processor unit; and
defining the guard band based on a sum of the deter mined number of dirty cache lines, the determined number of store instructions, and the determined number of additional instructions.

### Claim 16 (depends on 15)

The method of claim 15 further comprising redefining the guard band in response to determining that another cache line has become dirty or that an additional store instruction has been issued to the pipeline.

### Claim 17 (depends on 13)

The method of claim 13, wherein the cache of the virtual machine comprises a write-through cache, wherein said indicating in the log updates to memory of a virtual machine is in response to updates by the virtual machine to a cache line in the cache.

### Claim 18 (depends on 13)

The method of claim 13 further comprising marking a cache line in the cache of the virtual machine for logging in response to modification of the cache line.

### Claim 19 (depends on 13)

The method of claim 13, wherein each of the set of entries indicates a memory address of the virtual machine and data written to the memory address of the virtual machine, wherein updating the backup image based, at least in part, on the set of entries comprises indicating, for each memory address and data indicated in the set of entries, the data for updating a corresponding memory address of the backup image.