# US 9,519,374 B2 · In-cell touch panel and display device

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- Number: US 9,519,374 B2
- Document ID: US9519374B2
- Status: Granted
- Kind: B2
- Application number: 14/443,561
- Filed: 2014-09-20
- Published: 2016-09-22
- Granted: 2016-12-13
- Earliest claimed: 2014-05-30
- Assignees: Boe Technology Group Co., Ltd.; Beijing Boe Optoelectronics Technology Co., Ltd.
- Applicants: Boe Technology Group Co., Ltd.; Beijing Boe Optoelectronics Technology Co., Ltd.
- Inventors: Yingming Liu; Xue Dong; Hailin Xue; Haisheng Wang; Lei Wang; Shengji Yang; Hongjuan Liu
- Web page: https://patentgrep.com/patent/US9519374B2

## CPC

- G09G 3/3648: {using an active matrix (G09G3/367 - G09G3/3696 take precedence)}
- G02F 1/133345: {Insulating layers (G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence)}
- G02F 1/13338: {Input devices, e.g. touch panels}
- G02F 1/134309: {characterised by their geometrical arrangement}
- G02F 1/13439: {characterised by their electrical, optical, physical properties; materials therefor; method of making}
- G02F 1/136286: {Wiring, e.g. gate line, drain line}
- G06F 3/0412: {Digitisers structurally integrated in a display}
- G06F 3/04164: {Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads}
- G06F 3/04166: {Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving (Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184)}
- G06F 3/0443: {using a single layer of sensing electrodes}
- G09G 3/3677: {suitable for active matrices only}
- G09G 3/3688: {suitable for active matrices only}
- G02F 1/134345: {Subdivided pixels, e.g. for grey scale or redundancy}
- G02F 1/134372: {for fringe field switching [FFS] where the common electrode is not patterned}
- G06F 2203/04103: Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
- G06F 2203/04111: Cross over in capacitive digitiser, i.e. details of structures for connecting electrodes of the sensing pattern where the connections cross each other, e.g. bridge structures comprising an insulating layer, or vias through substrate
- G06F 2203/04112: Electrode mesh in capacitive digitiser: electrode for touch sensing is formed of a mesh of very fine, normally metallic, interconnected lines that are almost invisible to see. This provides a quite large but transparent electrode surface, without need for ITO or similar transparent conductive material
- G09G 2300/0809: Several active elements per pixel in active matrix panels
- G09G 2310/0202: Addressing of scan or signal lines
- G09G 2354/00: Aspects of interface with display user
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

An in-cell touch panel and a display device are disclosed. The in-cell touch panel includes: an upper substrate and a lower substrate arranged opposite to each other, a plurality of mutually independent self-capacitance electrodes arranged in the same layer, and a plurality of leads configured to connect the self-capacitance electrodes to a touch detection chip. The self-capacitance electrodes and the plurality of leads are arranged in different layers; an interlayer insulating layer is disposed between the self-capacitance electrodes and the leads; each self-capacitance electrode is electrically connected with the lead via a through hole running through the interlayer insulating layer; and the interlayer insulating layer is provided with recessed portions at overlapped areas of the self-capacitance electrodes and the leads other than the leads electrically connected with the self-capacitance electrodes. Therefore, the uniformity of display images of the touch panel can be improved.

## Claims

### Claim 1

An in-cell touch panel, comprising: an upper substrate and a lower substrate arranged opposite to each other, a plurality of mutually independent self-capacitance electrodes arranged in a same layer, and a plurality of leads configured to connect the self-capacitance electrodes to a touch detection chip, wherein
the self-capacitance electrodes and the leads are disposed on one side of the upper substrate facing the lower substrate or one side of the lower substrate facing the upper substrate;
the self-capacitance electrodes and the leads are arranged in different layers, and an interlayer insulating layer is disposed between the self-capacitance electrodes and the leads; and
the self-capacitance electrodes are electrically connected with the leads via through holes running through the interlayer insulating layer; and the interlayer insulating layer is provided with recessed portions at overlapped areas of the self-capacitance electrodes and the leads other than the leads electrically connected with the self-capacitance electrodes.

### Claim 2 (depends on 1)

The in-cell touch panel according to claim 1, wherein the through holes and the recessed portions have consistent cross sectional shape and are uniformly distributed in the interlayer insulating layer.

### Claim 3 (depends on 2)

The in-cell touch panel according to claim 2, wherein the self-capacitance electrodes are combined into a common electrode layer disposed on one side of the lower substrate facing the upper substrate; and in a display period, common electrode signals are applied to the self-capacitance electrodes.

### Claim 4 (depends on 2)

The in-cell touch panel according to claim 2, wherein the self-capacitance electrodes and pixel electrodes on the lower substrate are arranged in a same layer; and a pattern of the self-capacitance electrode is disposed at a gap between two adjacent pixel electrodes.

### Claim 5 (depends on 2)

The in-cell touch panel according to claim 2, further comprising: gate signal lines and data signal lines which intersect each other and are disposed between the lower substrate and a layer provided with the self-capacitance electrodes, in which two adjacent gate signal lines and adjacent data signal lines surround a sub-pixel; and
an extension direction of the leads is the same as that of the gate signal lines or the data signal lines.

### Claim 6 (depends on 5)

The in-cell touch panel according to claim 5, wherein two adjacent rows of pixels are taken as a pixel group, two gate signal ones are disposed between the two adjacent rows of pixels and configured to provide gate scanning signals for the two adjacent rows of pixels respectively; and
the leads are disposed at gaps between adjacent pixel groups and arranged in a same layer as the gate signal lines.

### Claim 7 (depends on 6)

The in-cell touch panel according to claim 6, wherein a layer provided with the gate signal lines is disposed between the lower substrate and a layer provided with the data signal lines;
first conducting portions and second conducting portions are arranged hi a same layer as the data signal lines;
the self-capacitance electrodes and corresponding leads are respectively electrically connected with the first conducting portions;
the self-capacitances are electrically connected with the second conducting portions through the recessed portions; and the leads and the second conducting portions are insulated from each other.

### Claim 8 (depends on 5)

The in-cell touch panel according to claim 5, wherein two gate signal ones are disposed between adjacent rows of pixels; every two adjacent rows of pixels are taken as a pixel group and share a data signal line disposed between the two adjacent rows of pixels; and
the leads are disposed at gaps between adjacent pixel groups and arranged in a same layer as the data signal ones.

### Claim 9 (depends on 2)

The in-cell touch panel according to claim 2, further comprising: a touch detection chip configured to determine a touch position by detection of capacitance variation of the self-capacitance electrode in a touch period.

### Claim 10 (depends on 1)

The in-cell touch panel according to claim 1, wherein the self-capacitance electrodes are combined into a common electrode layer disposed on one side of the lower substrate facing the upper substrate; and in a display period, common electrode signals are applied to the self-capacitance electrodes.

### Claim 11 (depends on 10)

The in-cell touch panel according to claim 10, further comprising: gate signal lines and data signal lines which intersect each other and are disposed between the lower substrate and a layer provided with the self-capacitance electrodes, in which two adjacent gate signal lines and adjacent data signal lines surround a sub-pixel; and
an extension direction of the leads is the same as that of the gate signal lines or the data signal lines.

### Claim 12 (depends on 10)

The in-cell touch panel according to claim 10, further comprising: a touch detection chip configured to determine a touch position by detection of capacitance variation of the self-capacitance electrode in a touch period.

### Claim 13 (depends on 1)

The in-cell touch panel according to claim 1, wherein the self-capacitance electrodes and pixel electrodes on the lower substrate are arranged in a same layer; and a pattern of the self-capacitance electrode is disposed at a gap between two adjacent pixel electrodes.

### Claim 14 (depends on 13)

The in-cell touch panel according to claim 13, further comprising: gate signal lines and data signal lines which intersect each other and are disposed between the lower substrate and a layer provided with the self-capacitance electrodes, in which two adjacent gate signal lines and adjacent data signal lines surround a sub-pixel; and
an extension direction of the leads is the same as that of the gate signal lines or the data signal lines.

### Claim 15 (depends on 1)

The in-cell touch panel according to claim 1, further comprising: gate signal lines and data signal lines which intersect each other and are disposed between the lower substrate and a layer provided with the self-capacitance electrodes, in which two adjacent gate signal lines and adjacent data signal lines surround a sub-pixel; and
an extension direction of the leads is the same as that of the gate signal lines or the data signal lines.

### Claim 16 (depends on 15)

The in-cell touch panel according to claim 15, wherein two adjacent rows of pixels are taken as a pixel group, two gate signal lines are disposed between the two adjacent rows of pixels and configured to provide gate scanning signals for the two adjacent rows of pixels respectively; and
the leads are disposed at gaps between adjacent pixel groups and arranged in a same layer as the gate signal lines.

### Claim 17 (depends on 16)

The in-cell touch panel according to claim 16, wherein a layer provided with the gate signal lines is disposed between the lower substrate and a layer provided with the data signal lines;
first conducting portions and second conducting portions are arranged in a same layer as the data signal lines;
the self-capacitance electrodes and corresponding leads are respectively electrically connected with the first conducting portions;
the self-capacitances are electrically connected with the second conducting portions through the recessed portions; and the leads and the second conducting portions are insulated from each other.

### Claim 18 (depends on 15)

The in-cell touch panel according to claim 15, wherein two gate signal lines are disposed between adjacent rows of pixels: every two adjacent rows of pixels are taken as a pixel group and share a data signal line disposed between the two adjacent rows of pixels; and
the leads are disposed at gaps between adjacent pixel groups and arranged in a same layer as the data signal lines.

### Claim 19 (depends on 1)

The in-cell touch panel according to claim 1, further comprising: a touch detection chip configured to determine a touch position by detection of capacitance variation of the self-capacitance electrode in a touch period.

### Claim 20 (depends on 1)

A display device, comprising the in-cell touch panel according to claim 1.
